Matthew Poremba has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/18548
Change subject: mem: Option to toggle DRAM low-power states
......................................................................
mem: Option to toggle DRAM low-power states
Adding an option to disable DRAM low-power states. The low power
states can have a significant impact on application performance
(sim_ticks) on the order of 2-3x, especially for compute-gpu apps.
The options allows for it to easily be enabled/disabled to compare
performance numbers.
Change-Id: Ib9bddbb792a1a6a4afb5339003472ff8f00a5859
---
M configs/common/Options.py
M configs/ruby/Ruby.py
M src/mem/DRAMCtrl.py
M src/mem/dram_ctrl.cc
M src/mem/dram_ctrl.hh
5 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/configs/common/Options.py b/configs/common/Options.py
index e0d691f..2918d79 100644
--- a/configs/common/Options.py
+++ b/configs/common/Options.py
@@ -100,6 +100,8 @@
parser.add_option("--mem-size", action="store", type="string",
default="512MB",
help="Specify the physical memory size (single
memory)")
+ parser.add_option("--disable-dram-powerdown", action="store_true",
+ help="Disable low-power states in DRAMCtrl")
parser.add_option("--memchecker", action="store_true")
diff --git a/configs/ruby/Ruby.py b/configs/ruby/Ruby.py
index 369a4e3..5547b85 100644
--- a/configs/ruby/Ruby.py
+++ b/configs/ruby/Ruby.py
@@ -130,6 +130,11 @@
else:
mem_ctrl.port = dir_cntrl.memory
+ # Disable low-power DRAM states if option is set
+ if issubclass(MemConfig.get(options.mem_type), DRAMCtrl):
+ mem_ctrl.disable_dram_powerdown = \
+ options.disable_dram_powerdown
+
index += 1
dir_cntrl.addr_ranges = dir_ranges
diff --git a/src/mem/DRAMCtrl.py b/src/mem/DRAMCtrl.py
index 93ea7d5..928f37e 100644
--- a/src/mem/DRAMCtrl.py
+++ b/src/mem/DRAMCtrl.py
@@ -135,6 +135,9 @@
# to be instantiated for a multi-channel configuration
channels = Param.Unsigned(1, "Number of channels")
+ # Enable or disable DRAM powerdown states
+ disable_dram_powerdown = Param.Bool(False, "Disable powerdown states")
+
# For power modelling we need to know if the DRAM has a DLL or not
dll = Param.Bool(True, "DRAM has DLL or not")
diff --git a/src/mem/dram_ctrl.cc b/src/mem/dram_ctrl.cc
index 08465aa..cfc285b 100644
--- a/src/mem/dram_ctrl.cc
+++ b/src/mem/dram_ctrl.cc
@@ -97,7 +97,7 @@
backendLatency(p->static_backend_latency),
nextBurstAt(0), prevArrival(0),
nextReqTime(0), activeRank(0), timeStampOffset(0),
- lastStatsResetTick(0)
+ lastStatsResetTick(0), disableDRAMPowerdown(p->disable_dram_powerdown)
{
// sanity check the ranks since we rely on bit slicing for the
// address decoding
@@ -705,7 +705,7 @@
// track if this is the last packet before idling
// and that there are no outstanding commands to this rank
if (dram_pkt->rankRef.isQueueEmpty() &&
- dram_pkt->rankRef.outstandingEvents == 0) {
+ dram_pkt->rankRef.outstandingEvents == 0 && !disableDRAMPowerdown)
{
// verify that there are no events scheduled
assert(!dram_pkt->rankRef.activateEvent.scheduled());
assert(!dram_pkt->rankRef.prechargeEvent.scheduled());
@@ -1856,7 +1856,8 @@
if (numBanksActive == 0) {
// no reads to this rank in the Q and no pending
// RD/WR or refresh commands
- if (isQueueEmpty() && outstandingEvents == 0) {
+ if (isQueueEmpty() && outstandingEvents == 0 &&
+ !memory.disableDRAMPowerdown) {
// should still be in ACT state since bank still open
assert(pwrState == PWR_ACT);
@@ -2057,7 +2058,7 @@
// Force PRE power-down if there are no outstanding commands
// in Q after refresh.
- } else if (isQueueEmpty()) {
+ } else if (isQueueEmpty() && !memory.disableDRAMPowerdown) {
// still have refresh event outstanding but there should
// be no other events outstanding
assert(outstandingEvents == 1);
@@ -2328,7 +2329,8 @@
// will issue refresh immediately upon entry
if (pwrStatePostRefresh == PWR_PRE_PDN && isQueueEmpty() &&
(memory.drainState() != DrainState::Draining) &&
- (memory.drainState() != DrainState::Drained)) {
+ (memory.drainState() != DrainState::Drained) &&
+ !memory.disableDRAMPowerdown) {
DPRINTF(DRAMState, "Rank %d bypassing refresh and
transitioning "
"to self refresh at %11u tick\n", rank, curTick());
powerDownSleep(PWR_SREF, curTick());
diff --git a/src/mem/dram_ctrl.hh b/src/mem/dram_ctrl.hh
index 54826e0..8cbb2ba 100644
--- a/src/mem/dram_ctrl.hh
+++ b/src/mem/dram_ctrl.hh
@@ -1140,6 +1140,9 @@
/** The time when stats were last reset used to calculate average
power */
Tick lastStatsResetTick;
+ /** Enable or disable DRAM powerdown states. */
+ bool disableDRAMPowerdown;
+
/**
* Upstream caches need this packet until true is returned, so
* hold it for deletion until a subsequent call
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: Ib9bddbb792a1a6a4afb5339003472ff8f00a5859
Gerrit-Change-Number: 18548
Gerrit-PatchSet: 1
Gerrit-Owner: Matthew Poremba <[email protected]>
Gerrit-MessageType: newchange
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