Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/18579
Change subject: cpu, sim: Return PortProxy &s from all the proxy accessors.
......................................................................
cpu, sim: Return PortProxy &s from all the proxy accessors.
This is a step towards merging the accessors for SE and FS modes.
Change-Id: I76818ab88b97097ac363e243be9cc1911b283090
---
M src/cpu/checker/thread_context.hh
M src/cpu/o3/thread_context.hh
M src/cpu/o3/thread_context_impl.hh
M src/cpu/simple_thread.hh
M src/cpu/thread_context.hh
M src/cpu/thread_state.cc
M src/cpu/thread_state.hh
M src/sim/process.cc
8 files changed, 19 insertions(+), 20 deletions(-)
diff --git a/src/cpu/checker/thread_context.hh
b/src/cpu/checker/thread_context.hh
index ed8add6..46ade24 100644
--- a/src/cpu/checker/thread_context.hh
+++ b/src/cpu/checker/thread_context.hh
@@ -146,7 +146,7 @@
PortProxy &getPhysProxy() override { return actualTC->getPhysProxy(); }
- FSTranslatingPortProxy &
+ PortProxy &
getVirtProxy() override
{
return actualTC->getVirtProxy();
@@ -164,7 +164,7 @@
actualTC->connectMemPorts(tc);
}
- SETranslatingPortProxy &
+ PortProxy &
getMemProxy() override
{
return actualTC->getMemProxy();
diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh
index e5f0187..a3698cf 100644
--- a/src/cpu/o3/thread_context.hh
+++ b/src/cpu/o3/thread_context.hh
@@ -132,7 +132,7 @@
PortProxy &getPhysProxy() override { return thread->getPhysProxy(); }
- FSTranslatingPortProxy &getVirtProxy() override;
+ PortProxy &getVirtProxy() override;
void
initMemProxies(ThreadContext *tc) override
@@ -140,7 +140,7 @@
thread->initMemProxies(tc);
}
- SETranslatingPortProxy &
+ PortProxy &
getMemProxy() override
{
return thread->getMemProxy();
diff --git a/src/cpu/o3/thread_context_impl.hh
b/src/cpu/o3/thread_context_impl.hh
index 58dee98..e05721b 100644
--- a/src/cpu/o3/thread_context_impl.hh
+++ b/src/cpu/o3/thread_context_impl.hh
@@ -54,7 +54,7 @@
#include "debug/O3CPU.hh"
template <class Impl>
-FSTranslatingPortProxy&
+PortProxy&
O3ThreadContext<Impl>::getVirtProxy()
{
return thread->getVirtProxy();
diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh
index 733047f..b044f53 100644
--- a/src/cpu/simple_thread.hh
+++ b/src/cpu/simple_thread.hh
@@ -213,18 +213,14 @@
}
PortProxy &getPhysProxy() override { return
ThreadState::getPhysProxy(); }
- FSTranslatingPortProxy &
- getVirtProxy() override
- {
- return ThreadState::getVirtProxy();
- }
+ PortProxy &getVirtProxy() override { return
ThreadState::getVirtProxy(); }
void initMemProxies(ThreadContext *tc) override
{
ThreadState::initMemProxies(tc);
}
- SETranslatingPortProxy &
+ PortProxy &
getMemProxy() override
{
return ThreadState::getMemProxy();
diff --git a/src/cpu/thread_context.hh b/src/cpu/thread_context.hh
index bdf5a00..f8b69d0 100644
--- a/src/cpu/thread_context.hh
+++ b/src/cpu/thread_context.hh
@@ -65,8 +65,6 @@
class CheckerCPU;
class Checkpoint;
class EndQuiesceEvent;
-class SETranslatingPortProxy;
-class FSTranslatingPortProxy;
class PortProxy;
class Process;
class System;
@@ -152,7 +150,7 @@
virtual PortProxy &getPhysProxy() = 0;
- virtual FSTranslatingPortProxy &getVirtProxy() = 0;
+ virtual PortProxy &getVirtProxy() = 0;
/**
* Initialise the physical and virtual port proxies and tie them to
@@ -162,7 +160,7 @@
*/
virtual void initMemProxies(ThreadContext *tc) = 0;
- virtual SETranslatingPortProxy &getMemProxy() = 0;
+ virtual PortProxy &getMemProxy() = 0;
virtual Process *getProcessPtr() = 0;
diff --git a/src/cpu/thread_state.cc b/src/cpu/thread_state.cc
index acb2971..c9fc564 100644
--- a/src/cpu/thread_state.cc
+++ b/src/cpu/thread_state.cc
@@ -133,7 +133,7 @@
return *physProxy;
}
-FSTranslatingPortProxy &
+PortProxy &
ThreadState::getVirtProxy()
{
assert(FullSystem);
@@ -141,7 +141,7 @@
return *virtProxy;
}
-SETranslatingPortProxy &
+PortProxy &
ThreadState::getMemProxy()
{
assert(!FullSystem);
diff --git a/src/cpu/thread_state.hh b/src/cpu/thread_state.hh
index 2006339..e00c86f 100644
--- a/src/cpu/thread_state.hh
+++ b/src/cpu/thread_state.hh
@@ -47,6 +47,9 @@
class Checkpoint;
+class FSTranslatingPortProxy;
+class SETranslatingPortProxy;
+
/**
* Struct for holding general thread state that is needed across CPU
* models. This includes things such as pointers to the process,
@@ -100,7 +103,7 @@
PortProxy &getPhysProxy();
- FSTranslatingPortProxy &getVirtProxy();
+ PortProxy &getVirtProxy();
Process *getProcessPtr() { return process; }
@@ -119,7 +122,7 @@
}
}
- SETranslatingPortProxy &getMemProxy();
+ PortProxy &getMemProxy();
/** Reads the number of instructions functionally executed and
* committed.
diff --git a/src/sim/process.cc b/src/sim/process.cc
index d400b5d..1249814 100644
--- a/src/sim/process.cc
+++ b/src/sim/process.cc
@@ -188,7 +188,9 @@
*/
delete np->pTable;
np->pTable = pTable;
- ntc->getMemProxy().setPageTable(np->pTable);
+ auto &proxy = dynamic_cast<SETranslatingPortProxy &>(
+ ntc->getMemProxy());
+ proxy.setPageTable(np->pTable);
np->memState = memState;
} else {
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I76818ab88b97097ac363e243be9cc1911b283090
Gerrit-Change-Number: 18579
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <gabebl...@google.com>
Gerrit-MessageType: newchange
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