Hi all, It has been a while that we have a set of pending patches which are implementing SVE contiguous load and store instructions.
https://gem5-review.googlesource.com/c/public/gem5/+/17991 https://gem5-review.googlesource.com/c/public/gem5/+/13518/13 https://gem5-review.googlesource.com/c/public/gem5/+/13519/11 While last patch (3) is arm only, first two patches are changing the cpu class by adding a new memory access predicate (1) and support for partial load/stores (2) Because they have been pending for a while now, but we are struggling to find reviewers, we are planning to merge them this Friday unless someone decides to review them. Please let me know if you have time to have a look at them. Many thanks Giacomo IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
