Tiago Mück has submitted this change and it was merged. ( https://gem5-review.googlesource.com/c/public/gem5/+/18792 )

Change subject: mem: Add invalid context id check on LLSC checks
......................................................................

mem: Add invalid context id check on LLSC checks

If the request's address is in the LLSC list, its context Id was being
fetched unconditionally, which could cause the assert at
Request::contextId() to fail.

Change-Id: Iae9791f81c8fe9a7fcd842cd8ab7db18f34f2808
Signed-off-by: Tiago Muck <[email protected]>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18792
Reviewed-by: Nikos Nikoleris <[email protected]>
Maintainer: Nikos Nikoleris <[email protected]>
Tested-by: kokoro <[email protected]>
---
M src/mem/abstract_mem.cc
M src/mem/abstract_mem.hh
2 files changed, 8 insertions(+), 3 deletions(-)

Approvals:
  Nikos Nikoleris: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/mem/abstract_mem.cc b/src/mem/abstract_mem.cc
index a998530..6870ba3 100644
--- a/src/mem/abstract_mem.cc
+++ b/src/mem/abstract_mem.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2010-2012,2017-2018 ARM Limited
+ * Copyright (c) 2010-2012,2017-2019 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -284,7 +284,10 @@
                 DPRINTF(LLSC, "Erasing lock record: context %d addr %#x\n",
                         i->contextId, paddr);
                 ContextID owner_cid = i->contextId;
-                ContextID requester_cid = pkt->req->contextId();
+                assert(owner_cid != InvalidContextID);
+                ContextID requester_cid = req->hasContextId() ?
+                                           req->contextId() :
+                                           InvalidContextID;
                 if (owner_cid != requester_cid) {
ThreadContext* ctx = system()->getThreadContext(owner_cid);
                     TheISA::globalClearExclusive(ctx);
diff --git a/src/mem/abstract_mem.hh b/src/mem/abstract_mem.hh
index 18d8ee9..8b944b9 100644
--- a/src/mem/abstract_mem.hh
+++ b/src/mem/abstract_mem.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012 ARM Limited
+ * Copyright (c) 2012, 2019 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -83,6 +83,8 @@
     // check for matching execution context
     bool matchesContext(const RequestPtr &req) const
     {
+        assert(contextId != InvalidContextID);
+        assert(req->hasContextId());
         return (contextId == req->contextId());
     }


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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: Iae9791f81c8fe9a7fcd842cd8ab7db18f34f2808
Gerrit-Change-Number: 18792
Gerrit-PatchSet: 4
Gerrit-Owner: Tiago Mück <[email protected]>
Gerrit-Reviewer: Daniel Carvalho <[email protected]>
Gerrit-Reviewer: Nikos Nikoleris <[email protected]>
Gerrit-Reviewer: Tiago Mück <[email protected]>
Gerrit-Reviewer: Xianwei Zhang <[email protected]>
Gerrit-Reviewer: kokoro <[email protected]>
Gerrit-CC: Srikant Bharadwaj <[email protected]>
Gerrit-MessageType: merged
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