Hello Giacomo Travaglini,
I'd like you to reexamine a change. Please visit
https://gem5-review.googlesource.com/c/public/gem5/+/13520
to look at the new patch set (#8).
Change subject: cpu-o3: Add support for pinned writes
......................................................................
cpu-o3: Add support for pinned writes
This patch adds support for pinning registers for a certain number of
consecutive writes. This is only relevant for timing CPU models
(functional-only models are unaffected), and it is primarily needed to
provide a realistic execution model for micro-coded operations whose
microops can write to non-overlapping portions of a destination
register, e.g. vector gather loads. In those cases, this mechanism
can disable renaming for a sequence of consecutive writes, thus making
the resulting execution more efficient: allocating a new physical
register for each microop would introduce a read-modify-write chain of
dependencies, while with these modifications the microops can write
back in parallel.
Please note that this new feature is only leveraged by O3CPU for the
time being.
Additional authors:
- Gabor Dozsa <gabor.do...@arm.com>
Change-Id: I07eb5fdbd1fa0b748c9bdc1174d9f330fda34f81
Signed-off-by: Giacomo Gabrielli <giacomo.gabrie...@arm.com>
---
M src/cpu/base_dyn_inst.hh
M src/cpu/base_dyn_inst_impl.hh
M src/cpu/o3/free_list.hh
M src/cpu/o3/iew_impl.hh
M src/cpu/o3/inst_queue_impl.hh
M src/cpu/o3/regfile.cc
M src/cpu/o3/regfile.hh
M src/cpu/o3/rename_impl.hh
M src/cpu/o3/rename_map.cc
M src/cpu/reg_class.hh
10 files changed, 183 insertions(+), 45 deletions(-)
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/13520
To unsubscribe, or for help writing mail filters, visit
https://gem5-review.googlesource.com/settings
Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I07eb5fdbd1fa0b748c9bdc1174d9f330fda34f81
Gerrit-Change-Number: 13520
Gerrit-PatchSet: 8
Gerrit-Owner: Giacomo Gabrielli <giacomo.gabrie...@arm.com>
Gerrit-Reviewer: Giacomo Gabrielli <giacomo.gabrie...@arm.com>
Gerrit-Reviewer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-CC: Andreas Sandberg <andreas.sandb...@arm.com>
Gerrit-CC: Jason Lowe-Power <ja...@lowepower.com>
Gerrit-MessageType: newpatchset
_______________________________________________
gem5-dev mailing list
gem5-dev@gem5.org
http://m5sim.org/mailman/listinfo/gem5-dev
