Hello Adria Armejach, Giacomo Travaglini,
I'd like you to reexamine a change. Please visit
https://gem5-review.googlesource.com/c/public/gem5/+/19169
to look at the new patch set (#2).
Change subject: arch-arm: Fix decoding for SVE memory instructions
......................................................................
arch-arm: Fix decoding for SVE memory instructions
Some SVE memory instructions are missing the makeSP function for
register operands that can be the SP register. This leads to
segmentation faults on the application side as the wrong register is
decoded.
Change-Id: Ic71abc845e0786a60d665231b5f7b024d2955f4b
Signed-off-by: Giacomo Gabrielli <[email protected]>
Reviewed-by: Giacomo Travaglini <[email protected]>
---
M src/arch/arm/isa/formats/sve_2nd_level.isa
1 file changed, 37 insertions(+), 30 deletions(-)
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: Ic71abc845e0786a60d665231b5f7b024d2955f4b
Gerrit-Change-Number: 19169
Gerrit-PatchSet: 2
Gerrit-Owner: Giacomo Gabrielli <[email protected]>
Gerrit-Reviewer: Adria Armejach <[email protected]>
Gerrit-Reviewer: Giacomo Travaglini <[email protected]>
Gerrit-CC: kokoro <[email protected]>
Gerrit-MessageType: newpatchset
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