Tiago Mück has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/19209

Change subject: sim: Add scheduleInstStop to System
......................................................................

sim: Add scheduleInstStop to System

scheduleInstStop schedules an event to stop the simulation when the total
number of simulated instructions by all CPUs reaches the given value.

Change-Id: Iea0222016150988519776ceef53901ccbfd74d41
Signed-off-by: Tiago Mück <tiago.m...@arm.com>
---
M src/sim/System.py
M src/sim/system.cc
M src/sim/system.hh
3 files changed, 30 insertions(+), 3 deletions(-)



diff --git a/src/sim/System.py b/src/sim/System.py
index 9928887..ad8ceb1 100644
--- a/src/sim/System.py
+++ b/src/sim/System.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2017 ARM Limited
+# Copyright (c) 2017,2019 ARM Limited
 # All rights reserved.
 #
 # The license below extends only to copyright in the software and shall
@@ -61,6 +61,14 @@
         PyBindMethod("setMemoryMode"),
     ]

+    @cxxMethod
+    def scheduleInstStop(self, insts, cause):
+        """
+        Schedules an event to stop the simulation when the total number of
+        simulated instructions by all CPUs reaches the given value.
+        """
+        pass
+
     memories = VectorParam.AbstractMemory(Self.all,
                                           "All memories in the system")
mem_mode = Param.MemoryMode('atomic', "The mode the memory system is in")
diff --git a/src/sim/system.cc b/src/sim/system.cc
index 7476965..2b2dfc3 100644
--- a/src/sim/system.cc
+++ b/src/sim/system.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2011-2014,2017-2018 ARM Limited
+ * Copyright (c) 2011-2014,2017-2019 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -71,6 +71,7 @@
 #include "sim/debug.hh"
 #include "sim/full_system.hh"
 #include "sim/redirect_path.hh"
+#include "sim/sim_events.hh"

 /**
  * To avoid linking errors with LTO, only include the header if we
@@ -475,6 +476,15 @@
 }

 void
+System::scheduleInstStop(Counter insts, const char *cause)
+{
+    const Tick now(instEventQueue.getCurTick());
+    Event *event(new LocalSimLoopExitEvent(cause, 0));
+
+    instEventQueue.schedule(event, now + insts);
+}
+
+void
 System::printSystems()
 {
     ios::fmtflags flags(cerr.flags());
diff --git a/src/sim/system.hh b/src/sim/system.hh
index d7a3b20..1a0f43a 100644
--- a/src/sim/system.hh
+++ b/src/sim/system.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012, 2014, 2018 ARM Limited
+ * Copyright (c) 2012, 2014, 2018, 2019 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -607,6 +607,15 @@
     std::map<std::pair<uint32_t,uint32_t>, Tick>  lastWorkItemStarted;
     std::map<uint32_t, Stats::Histogram*> workItemStats;

+    /**
+     * Schedules an event to stop the simulation when the total number of
+     * simulated instructions by all CPUs reaches the given value.
+     *
+     * @param insts Maximum number of simulated instructions
+     * @param cause Description to be passed to the event
+     */
+    void scheduleInstStop(Counter insts, const char *cause);
+
     ////////////////////////////////////////////
     //
     // STATIC GLOBAL SYSTEM LIST

--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: Iea0222016150988519776ceef53901ccbfd74d41
Gerrit-Change-Number: 19209
Gerrit-PatchSet: 1
Gerrit-Owner: Tiago Mück <tiago.m...@arm.com>
Gerrit-MessageType: newchange
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