Hi Polydoros, That would be a very useful addition indeed. Coming up with an accurate/appropriate lane utilization stat, though, is probably not straightforward, as not all vector instructions in SVE are plain vector data-processing operations, and not all instructions are predicated. In this regard, I think aligning to the SVE PMU specification could be a good approach. The SVE specification is available here, and section A.2.3 covers how to approximate vector utilization: https://developer.arm.com/docs/ddi0584/latest/arm-architecture-reference-manual-supplement-the-scalable-vector-extension-sve-for-armv8-a What would be needed here is to implement the various counters SVE_PRED_FULL_SPEC, etc. To implement them, one option could be to start extending the appropriate instruction templates for the execution part (in src/arch/arm/isa/templates/sve.isa, e.g. "SveOpExecute") with an extra snippet (e.g. a new %(gp_stats)s) to add specific code for gathering stats about the predicate used. The snippet would need to be filled in appropriately for the various SVE instructions from python (e.g. in src/arch/arm/isa/insts/sve.isa). I hope we have been consistent with naming conventions - the general predicate should always be called "gp", so that might help to avoid repetition.
Re. the SVE instruction mix, which you mention: if you are referring to the opclass stats, please note that at the moment there is no way to differentiate between NEON and SVE - both family of instructions are marked with Simd... opclasses. I am planning to do a review of the opclasses used for SVE, so that it will be possible to isolate them from the NEON ones, and also I would like to have a finer-grain categorization, closer in spirit to the categorization suggested in the PMU spec; unfortunately at the moment I cannot give you a clear ETA, but I hope it will happen soon. Just some thoughts, I hope this helps. Giacomo On 12/11/2019, 17:36, "gem5-dev on behalf of Polydoros Petrakis" <[email protected] on behalf of [email protected]> wrote: Hi all, I would like to add new gem5 statistics, regarding the average SVE Vector lane utilization. (gem5 already provides statistics regarding the SVE instruction mix). A closely related work is the following: https://community.arm.com/developer/tools-software/hpc/b/hpc-blog/posts/optimizing-hpcg-for-arm-sve I think we basically need to keep track of the predicate registers values for the various SVE instructions. Any ideas which files/classes shall I edit for adding such functionality? Thanks in advance, Polydoros Petrakis ------- Institute of Computer Science (ICS), Foundation for Research & Technology - Hellas (FORTH), Heraklion, Crete, Greece. _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
