Matthew Poremba has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/27507 )
Change subject: arch-x86: Do not fixup faults in TLB
......................................................................
arch-x86: Do not fixup faults in TLB
Faults in the TLB ought to cause a page walk. Force that by removing
the fixup in X86 TLB.
This fixes rare race conditions where a timing page walk is
intercepted by a TLB miss which fixes up the fault resulting in
double calls to allocateMem in Process class.
Change-Id: Iaef4d636cd2997144d8bc5012cd7c2a0a97102e5
---
M src/arch/x86/tlb.cc
1 file changed, 0 insertions(+), 7 deletions(-)
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc
index 53492b0..baeeb66 100644
--- a/src/arch/x86/tlb.cc
+++ b/src/arch/x86/tlb.cc
@@ -397,13 +397,6 @@
Process *p = tc->getProcessPtr();
const EmulationPageTable::Entry *pte =
p->pTable->lookup(vaddr);
- if (!pte && mode != Execute) {
- // Check if we just need to grow the stack.
- if (p->fixupFault(vaddr)) {
- // If we did, lookup the entry for the new
page.
- pte = p->pTable->lookup(vaddr);
- }
- }
if (!pte) {
return std::make_shared<PageFault>(vaddr, true,
mode,
true, false);
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Iaef4d636cd2997144d8bc5012cd7c2a0a97102e5
Gerrit-Change-Number: 27507
Gerrit-PatchSet: 1
Gerrit-Owner: Matthew Poremba <matthew.pore...@amd.com>
Gerrit-MessageType: newchange
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