Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/24287 )
Change subject: configs,arch,sim: Move fixFuncEventAddr into the Workload
class.
......................................................................
configs,arch,sim: Move fixFuncEventAddr into the Workload class.
This is specialized per arch, and the Workload class is the only thing
actually using it. It doesn't make any sense to dispatch those calls
over to the System object, especially since that was, in most cases,
the only reason an ISA specific system class even still existed.
After this change, only ARM still has an architecture specific System
class.
Change-Id: I81b6c4db14b612bff8840157cfc56393370095e2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24287
Maintainer: Gabe Black <gabebl...@google.com>
Tested-by: kokoro <noreply+kok...@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
---
M configs/common/FSConfig.py
M src/arch/arm/fs_workload.hh
M src/arch/arm/system.hh
D src/arch/mips/MipsSystem.py
M src/arch/mips/SConscript
D src/arch/mips/bare_iron/system.cc
D src/arch/mips/bare_iron/system.hh
D src/arch/mips/linux/system.cc
D src/arch/mips/linux/system.hh
D src/arch/mips/system.cc
D src/arch/mips/system.hh
D src/arch/riscv/RiscvSystem.py
M src/arch/riscv/SConscript
D src/arch/riscv/system.cc
D src/arch/riscv/system.hh
M src/arch/riscv/tlb.cc
M src/arch/sparc/SConscript
D src/arch/sparc/SparcSystem.py
D src/arch/sparc/system.cc
D src/arch/sparc/system.hh
M src/arch/x86/SConscript
D src/arch/x86/X86System.py
M src/arch/x86/pagetable.hh
M src/arch/x86/process.cc
D src/arch/x86/system.cc
D src/arch/x86/system.hh
M src/arch/x86/tlb.hh
M src/mem/multi_level_page_table.hh
M src/sim/SConscript
M src/sim/system.hh
D src/sim/workload.cc
M src/sim/workload.hh
32 files changed, 17 insertions(+), 957 deletions(-)
Approvals:
Giacomo Travaglini: Looks good to me, approved
Gabe Black: Looks good to me, approved
kokoro: Regressions pass
diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py
index b3e248e..7fc5557 100644
--- a/configs/common/FSConfig.py
+++ b/configs/common/FSConfig.py
@@ -108,7 +108,7 @@
def childImage(self, ci):
self.image.child.image_file = ci
- self = SparcSystem()
+ self = System()
if not mdesc:
# generic system
mdesc = SysConfig()
@@ -362,7 +362,7 @@
ide = IdeController(disks=Parent.disks,
pci_func=0, pci_dev=0, pci_bus=0)
- self = LinuxMipsSystem()
+ self = System()
if not mdesc:
# generic system
mdesc = SysConfig()
@@ -453,7 +453,7 @@
def makeX86System(mem_mode, numCPUs=1, mdesc=None, workload=None,
Ruby=False):
- self = X86System()
+ self = System()
if workload is None:
workload = X86FsWorkload()
diff --git a/src/arch/arm/fs_workload.hh b/src/arch/arm/fs_workload.hh
index d6e375c..46694eb 100644
--- a/src/arch/arm/fs_workload.hh
+++ b/src/arch/arm/fs_workload.hh
@@ -117,6 +117,14 @@
FsWorkload(Params *p);
void initState() override;
+
+ Addr
+ fixFuncEventAddr(Addr addr) const override
+ {
+ // Remove the low bit that thumb symbols have set
+ // but that aren't actually odd aligned
+ return addr & ~1;
+ }
};
} // namespace ArmISA
diff --git a/src/arch/arm/system.hh b/src/arch/arm/system.hh
index 1339c1c..203be1a 100644
--- a/src/arch/arm/system.hh
+++ b/src/arch/arm/system.hh
@@ -143,14 +143,6 @@
ArmSystem(Params *p);
- Addr
- fixFuncEventAddr(Addr addr) override
- {
- // Remove the low bit that thumb symbols have set
- // but that aren't actually odd aligned
- return addr & ~1;
- }
-
/** true if this a multiprocessor system */
bool multiProc;
diff --git a/src/arch/mips/MipsSystem.py b/src/arch/mips/MipsSystem.py
deleted file mode 100644
index d32f30a..0000000
--- a/src/arch/mips/MipsSystem.py
+++ /dev/null
@@ -1,61 +0,0 @@
-# -*- mode:python -*-
-
-# Copyright (c) 2007 MIPS Technologies, Inc.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are
-# met: redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer;
-# redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution;
-# neither the name of the copyright holders nor the names of its
-# contributors may be used to endorse or promote products derived from
-# this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-from m5.defines import buildEnv
-from m5.params import *
-from m5.proxy import *
-
-from m5.objects.System import System
-
-class MipsSystem(System):
- type = 'MipsSystem'
- cxx_header = 'arch/mips/system.hh'
- console = Param.String("file that contains the console code")
- bare_iron = Param.Bool(False, "Using Bare Iron Mode?")
- hex_file_name = Param.String("test.hex","hex file that contains
[address,data] pairs")
- system_type = Param.UInt64("Type of system we are emulating")
- system_rev = Param.UInt64("Revision of system we are emulating")
-
-class LinuxMipsSystem(MipsSystem):
- type = 'LinuxMipsSystem'
- cxx_header = 'arch/mips/linux/system.hh'
- system_type = 34
- system_rev = 1 << 10
-
- boot_cpu_frequency = Param.Frequency(Self.cpu[0].clk_domain.clock[0]
- .frequency,
- "boot processor frequency")
-
-class BareIronMipsSystem(MipsSystem):
- type = 'BareIronMipsSystem'
- cxx_header = 'arch/mips/bare_iron/system.hh'
- bare_iron = True
- system_type = 34
- system_rev = 1 << 10
- hex_file_name = Param.String('test.hex',"hex file that contains
[address,data] pairs")
-
diff --git a/src/arch/mips/SConscript b/src/arch/mips/SConscript
index c426760..0e4fcf2 100644
--- a/src/arch/mips/SConscript
+++ b/src/arch/mips/SConscript
@@ -29,7 +29,6 @@
Import('*')
if env['TARGET_ISA'] == 'mips':
- Source('bare_iron/system.cc')
Source('decoder.cc')
Source('dsp.cc')
Source('faults.cc')
@@ -38,18 +37,15 @@
Source('isa.cc')
Source('linux/linux.cc')
Source('linux/process.cc')
- Source('linux/system.cc')
Source('pagetable.cc')
Source('process.cc')
Source('remote_gdb.cc')
Source('stacktrace.cc')
- Source('system.cc')
Source('tlb.cc')
Source('utility.cc')
SimObject('MipsInterrupts.py')
SimObject('MipsISA.py')
- SimObject('MipsSystem.py')
SimObject('MipsTLB.py')
DebugFlag('MipsPRA')
diff --git a/src/arch/mips/bare_iron/system.cc
b/src/arch/mips/bare_iron/system.cc
deleted file mode 100644
index 0372bbc..0000000
--- a/src/arch/mips/bare_iron/system.cc
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * Copyright (c) 2007 MIPS Technologies, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "arch/mips/bare_iron/system.hh"
-
-#include "params/BareIronMipsSystem.hh"
-
-BareIronMipsSystem::BareIronMipsSystem(Params *p)
- : MipsSystem(p)
-{ }
-
-BareIronMipsSystem::~BareIronMipsSystem()
-{ }
-
-BareIronMipsSystem *
-BareIronMipsSystemParams::create()
-{
- return new BareIronMipsSystem(this);
-}
-
diff --git a/src/arch/mips/bare_iron/system.hh
b/src/arch/mips/bare_iron/system.hh
deleted file mode 100644
index b972e9c..0000000
--- a/src/arch/mips/bare_iron/system.hh
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * Copyright (c) 2007 MIPS Technologies, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __ARCH_MIPS_BARE_IRON_SYSTEM_HH__
-#define __ARCH_MIPS_BARE_IRON_SYSTEM_HH__
-
-#include "arch/mips/system.hh"
-#include "params/BareIronMipsSystem.hh"
-
-/**
- * This class contains linux specific system code (Loading, Events).
- * It points to objects that are the system binaries to load and patches
them
- * appropriately to work in simulator.
- */
-class BareIronMipsSystem : public MipsSystem
-{
- public:
- static const int CommandLineSize = 256;
-
- BareIronMipsSystem(Params *p);
- ~BareIronMipsSystem();
-};
-
-#endif // __ARCH_MIPS_BARE_IRON_SYSTEM_HH__
diff --git a/src/arch/mips/linux/system.cc b/src/arch/mips/linux/system.cc
deleted file mode 100644
index b2a2a4d..0000000
--- a/src/arch/mips/linux/system.cc
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * Copyright (c) 2004-2006 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * This code loads the linux kernel, console, pal and patches certain
- * functions. The symbol tables are loaded so that traces can show
- * the executing function and we can skip functions. Various delay
- * loops are skipped and their final values manually computed to speed
- * up boot time.
- */
-
-#include "arch/mips/linux/system.hh"
-
-#include "arch/generic/linux/threadinfo.hh"
-#include "arch/mips/idle_event.hh"
-#include "arch/mips/system.hh"
-#include "base/loader/symtab.hh"
-#include "cpu/base.hh"
-#include "cpu/thread_context.hh"
-#include "debug/Thread.hh"
-#include "dev/platform.hh"
-#include "kern/linux/events.hh"
-#include "kern/linux/printk.hh"
-#include "mem/physical.hh"
-#include "mem/port.hh"
-#include "sim/byteswap.hh"
-
-using namespace std;
-using namespace MipsISA;
-using namespace Linux;
-
-LinuxMipsSystem::LinuxMipsSystem(Params *p)
- : MipsSystem(p)
-{
-}
-
-LinuxMipsSystem::~LinuxMipsSystem()
-{
-}
-
-
-void
-LinuxMipsSystem::setDelayLoop(ThreadContext *tc)
-{
- panic("setDelayLoop not implemented.\n");
-}
-
-
-void
-LinuxMipsSystem::SkipDelayLoop::process(ThreadContext *tc)
-{
- MipsISA::SkipFunc::process(tc);
- // calculate and set loops_per_jiffy
- ((LinuxMipsSystem *)tc->getSystemPtr())->setDelayLoop(tc);
-}
-
-void
-LinuxMipsSystem::PrintThreadInfo::process(ThreadContext *tc)
-{
- Linux::ThreadInfo ti(tc);
-
- DPRINTF(Thread, "Currently Executing Thread %s, pid %d, started
at: %d\n",
- ti.curTaskName(), ti.curTaskPID(), ti.curTaskStart());
-}
-
-LinuxMipsSystem *
-LinuxMipsSystemParams::create()
-{
- return new LinuxMipsSystem(this);
-}
diff --git a/src/arch/mips/linux/system.hh b/src/arch/mips/linux/system.hh
deleted file mode 100644
index ce3f2f0..0000000
--- a/src/arch/mips/linux/system.hh
+++ /dev/null
@@ -1,98 +0,0 @@
-/*
- * Copyright (c) 2004-2006 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __ARCH_MIPS_LINUX_SYSTEM_HH__
-#define __ARCH_MIPS_LINUX_SYSTEM_HH__
-
-class ThreadContext;
-
-class BreakPCEvent;
-class IdleStartEvent;
-
-#include "arch/mips/idle_event.hh"
-#include "arch/mips/system.hh"
-#include "kern/linux/events.hh"
-#include "params/LinuxMipsSystem.hh"
-
-/**
- * This class contains linux specific system code (Loading, Events).
- * It points to objects that are the system binaries to load and patches
them
- * appropriately to work in simulator.
- */
-class LinuxMipsSystem : public MipsSystem
-{
- private:
- using SkipFunc = MipsISA::SkipFunc;
-
- class SkipDelayLoop : public SkipFunc
- {
- public:
- SkipDelayLoop(PCEventScope *s, const std::string &desc, Addr
addr) :
- SkipFunc(s, desc, addr)
- {}
- void process(ThreadContext *tc) override;
- };
-
- class PrintThreadInfo : public PCEvent
- {
- public:
- PrintThreadInfo(PCEventScope *s, const std::string &desc, Addr
addr) :
- PCEvent(s, desc, addr)
- {}
- void process(ThreadContext *tc) override;
- };
-
-
- /**
- * Addresses defining where the kernel bootloader places various
- * elements. Details found in include/asm-mips/system.h
- */
- Addr KernelStart; // Lookup the symbol swapper_pg_dir
-
- public:
- Addr InitStack() const { return KernelStart + 0x02000; }
- Addr EmptyPGT() const { return KernelStart + 0x04000; }
- Addr EmptyPGE() const { return KernelStart + 0x08000; }
- Addr ZeroPGE() const { return KernelStart + 0x0A000; }
- Addr StartAddr() const { return KernelStart + 0x10000; }
-
- Addr Param() const { return ZeroPGE() + 0x0; }
- Addr CommandLine() const { return Param() + 0x0; }
- Addr InitrdStart() const { return Param() + 0x100; }
- Addr InitrdSize() const { return Param() + 0x108; }
- static const int CommandLineSize = 256;
-
- public:
- typedef LinuxMipsSystemParams Params;
- LinuxMipsSystem(Params *p);
- ~LinuxMipsSystem();
-
- void setDelayLoop(ThreadContext *tc);
-};
-
-#endif // __ARCH_MIPS_LINUX_SYSTEM_HH__
diff --git a/src/arch/mips/system.cc b/src/arch/mips/system.cc
deleted file mode 100644
index bef77be..0000000
--- a/src/arch/mips/system.cc
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * Copyright (c) 2002-2005 The Regents of The University of Michigan
- * Copyright (c) 2007 MIPS Technologies, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "arch/mips/system.hh"
-
-#include "arch/mips/registers.hh"
-#include "base/loader/object_file.hh"
-#include "base/loader/symtab.hh"
-#include "base/trace.hh"
-#include "mem/physical.hh"
-#include "params/MipsSystem.hh"
-#include "sim/byteswap.hh"
-
-void
-MipsISA::SkipFunc::returnFromFuncIn(ThreadContext *tc)
-{
- MipsISA::PCState newPC = tc->pcState();
- newPC.set(tc->readIntReg(MipsISA::ReturnAddressReg));
- tc->pcState(newPC);
-}
-
-MipsSystem::MipsSystem(Params *p) : System(p)
-{
-}
-
-MipsSystem::~MipsSystem()
-{
-}
-
-Addr
-MipsSystem::fixFuncEventAddr(Addr addr)
-{
- return addr;
-}
-
-void
-MipsSystem::setMipsAccess(Addr access)
-{}
-
-bool
-MipsSystem::breakpoint()
-{
- return 0;
-}
-
-MipsSystem *
-MipsSystemParams::create()
-{
- return new MipsSystem(this);
-}
-
diff --git a/src/arch/mips/system.hh b/src/arch/mips/system.hh
deleted file mode 100644
index 87bf205..0000000
--- a/src/arch/mips/system.hh
+++ /dev/null
@@ -1,87 +0,0 @@
-/*
- * Copyright (c) 2002-2005 The Regents of The University of Michigan
- * Copyright (c) 2007 MIPS Technologies, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __ARCH_MIPS_SYSTEM_HH__
-#define __ARCH_MIPS_SYSTEM_HH__
-
-#include <string>
-#include <vector>
-
-#include "base/loader/symtab.hh"
-#include "cpu/pc_event.hh"
-#include "kern/system_events.hh"
-#include "params/MipsSystem.hh"
-#include "sim/sim_object.hh"
-#include "sim/system.hh"
-
-
-namespace MipsISA
-{
-
-class SkipFunc : public SkipFuncBase
-{
- public:
- using SkipFuncBase::SkipFuncBase;
-
- void returnFromFuncIn(ThreadContext *tc) override;
-};
-
-} // namespace MipsaISA
-
-class MipsSystem : public System
-{
- public:
- typedef MipsSystemParams Params;
- MipsSystem(Params *p);
- ~MipsSystem();
-
- virtual bool breakpoint();
-
- public:
-
- /**
- * Set the m5MipsAccess pointer in the console
- */
- void setMipsAccess(Addr access);
-
- /** console symbol table */
- SymbolTable *consoleSymtab;
-
- /** Object pointer for the console code */
- ObjectFile *console;
-
- protected:
- const Params *params() const { return (const Params *)_params; }
-
- virtual Addr fixFuncEventAddr(Addr addr);
-
-};
-
-#endif
-
diff --git a/src/arch/riscv/RiscvSystem.py b/src/arch/riscv/RiscvSystem.py
deleted file mode 100644
index c68fa8c..0000000
--- a/src/arch/riscv/RiscvSystem.py
+++ /dev/null
@@ -1,36 +0,0 @@
-# -*- mode:python -*-
-
-# Copyright (c) 2016 RISC-V Foundation
-# Copyright (c) 2016 The University of Virginia
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are
-# met: redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer;
-# redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution;
-# neither the name of the copyright holders nor the names of its
-# contributors may be used to endorse or promote products derived from
-# this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-from m5.params import *
-
-from m5.objects.System import System
-
-class RiscvSystem(System):
- type = 'RiscvSystem'
- cxx_header = 'arch/riscv/system.hh'
diff --git a/src/arch/riscv/SConscript b/src/arch/riscv/SConscript
index 4679102..74217cf 100644
--- a/src/arch/riscv/SConscript
+++ b/src/arch/riscv/SConscript
@@ -52,7 +52,6 @@
Source('remote_gdb.cc')
Source('stacktrace.cc')
Source('tlb.cc')
- Source('system.cc')
Source('linux/process.cc')
Source('linux/linux.cc')
@@ -63,7 +62,6 @@
SimObject('RiscvInterrupts.py')
SimObject('RiscvISA.py')
SimObject('RiscvTLB.py')
- SimObject('RiscvSystem.py')
DebugFlag('RiscvMisc')
DebugFlag('RiscvTLB')
diff --git a/src/arch/riscv/system.cc b/src/arch/riscv/system.cc
deleted file mode 100644
index fe23405..0000000
--- a/src/arch/riscv/system.cc
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * Copyright (c) 2002-2005 The Regents of The University of Michigan
- * Copyright (c) 2007 MIPS Technologies, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "arch/riscv/system.hh"
-
-#include "params/RiscvSystem.hh"
-
-RiscvSystem *
-RiscvSystemParams::create()
-{
- return new RiscvSystem(this);
-}
-
diff --git a/src/arch/riscv/system.hh b/src/arch/riscv/system.hh
deleted file mode 100644
index fa4f766..0000000
--- a/src/arch/riscv/system.hh
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * Copyright (c) 2002-2005 The Regents of The University of Michigan
- * Copyright (c) 2007 MIPS Technologies, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __ARCH_RISCV_SYSTEM_HH__
-#define __ARCH_RISCV_SYSTEM_HH__
-
-#include "sim/system.hh"
-
-class RiscvSystem : public System
-{
- public:
- using System::System;
- Addr fixFuncEventAddr(Addr addr) override { return addr; }
-};
-
-#endif
-
diff --git a/src/arch/riscv/tlb.cc b/src/arch/riscv/tlb.cc
index ac4eca7..562be55 100644
--- a/src/arch/riscv/tlb.cc
+++ b/src/arch/riscv/tlb.cc
@@ -36,7 +36,6 @@
#include "arch/riscv/fs_workload.hh"
#include "arch/riscv/pagetable.hh"
#include "arch/riscv/pra_constants.hh"
-#include "arch/riscv/system.hh"
#include "arch/riscv/utility.hh"
#include "base/inifile.hh"
#include "base/str.hh"
@@ -48,6 +47,7 @@
#include "params/RiscvTLB.hh"
#include "sim/full_system.hh"
#include "sim/process.hh"
+#include "sim/system.hh"
using namespace std;
using namespace RiscvISA;
diff --git a/src/arch/sparc/SConscript b/src/arch/sparc/SConscript
index 4097ebb..c7d0940 100644
--- a/src/arch/sparc/SConscript
+++ b/src/arch/sparc/SConscript
@@ -44,7 +44,6 @@
Source('remote_gdb.cc')
Source('solaris/process.cc')
Source('solaris/solaris.cc')
- Source('system.cc')
Source('tlb.cc')
Source('ua2005.cc')
Source('utility.cc')
@@ -53,7 +52,6 @@
SimObject('SparcInterrupts.py')
SimObject('SparcISA.py')
SimObject('SparcNativeTrace.py')
- SimObject('SparcSystem.py')
SimObject('SparcTLB.py')
DebugFlag('Sparc', "Generic SPARC ISA stuff")
diff --git a/src/arch/sparc/SparcSystem.py b/src/arch/sparc/SparcSystem.py
deleted file mode 100644
index 5c56e1b..0000000
--- a/src/arch/sparc/SparcSystem.py
+++ /dev/null
@@ -1,33 +0,0 @@
-# Copyright (c) 2007 The Regents of The University of Michigan
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are
-# met: redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer;
-# redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution;
-# neither the name of the copyright holders nor the names of its
-# contributors may be used to endorse or promote products derived from
-# this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-from m5.params import *
-
-from m5.objects.System import System
-
-class SparcSystem(System):
- type = 'SparcSystem'
- cxx_header = 'arch/sparc/system.hh'
diff --git a/src/arch/sparc/system.cc b/src/arch/sparc/system.cc
deleted file mode 100644
index d06c172..0000000
--- a/src/arch/sparc/system.cc
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * Copyright (c) 2002-2006 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "arch/sparc/system.hh"
-
-#include "params/SparcSystem.hh"
-
-SparcSystem *
-SparcSystemParams::create()
-{
- return new SparcSystem(this);
-}
diff --git a/src/arch/sparc/system.hh b/src/arch/sparc/system.hh
deleted file mode 100644
index 752d112..0000000
--- a/src/arch/sparc/system.hh
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * Copyright (c) 2002-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __ARCH_SPARC_SYSTEM_HH__
-#define __ARCH_SPARC_SYSTEM_HH__
-
-#include "sim/system.hh"
-
-class SparcSystem : public System
-{
- public:
- using System::System;
-
- Addr fixFuncEventAddr(Addr addr) override { return addr; }
-};
-
-#endif
-
diff --git a/src/arch/x86/SConscript b/src/arch/x86/SConscript
index bfe8d9d..9bf4fb8 100644
--- a/src/arch/x86/SConscript
+++ b/src/arch/x86/SConscript
@@ -66,7 +66,6 @@
Source('pseudo_inst.cc')
Source('remote_gdb.cc')
Source('stacktrace.cc')
- Source('system.cc')
Source('tlb.cc')
Source('types.cc')
Source('utility.cc')
@@ -75,7 +74,6 @@
SimObject('X86ISA.py')
SimObject('X86LocalApic.py')
SimObject('X86NativeTrace.py')
- SimObject('X86System.py')
SimObject('X86TLB.py')
DebugFlag('Faults', "Trace all faults/exceptions/traps")
diff --git a/src/arch/x86/X86System.py b/src/arch/x86/X86System.py
deleted file mode 100644
index e53aa2e..0000000
--- a/src/arch/x86/X86System.py
+++ /dev/null
@@ -1,40 +0,0 @@
-# Copyright (c) 2007-2008 The Hewlett-Packard Development Company
-# All rights reserved.
-#
-# The license below extends only to copyright in the software and shall
-# not be construed as granting a license to any other intellectual
-# property including but not limited to intellectual property relating
-# to a hardware implementation of the functionality of the software
-# licensed hereunder. You may use the software subject to the license
-# terms below provided that you ensure that this notice is replicated
-# unmodified and in its entirety in all distributions of the software,
-# modified or unmodified, in source code or in binary form.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are
-# met: redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer;
-# redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution;
-# neither the name of the copyright holders nor the names of its
-# contributors may be used to endorse or promote products derived from
-# this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-from m5.objects.System import System
-
-class X86System(System):
- type = 'X86System'
- cxx_header = 'arch/x86/system.hh'
diff --git a/src/arch/x86/pagetable.hh b/src/arch/x86/pagetable.hh
index 63bd249..803d0de 100644
--- a/src/arch/x86/pagetable.hh
+++ b/src/arch/x86/pagetable.hh
@@ -43,11 +43,12 @@
#include <string>
#include <vector>
+#include "arch/x86/isa_traits.hh"
#include "base/bitunion.hh"
#include "base/types.hh"
#include "base/trie.hh"
-#include "arch/x86/system.hh"
#include "debug/MMU.hh"
+#include "mem/port_proxy.hh"
class Checkpoint;
class ThreadContext;
diff --git a/src/arch/x86/process.cc b/src/arch/x86/process.cc
index b298362..3743049 100644
--- a/src/arch/x86/process.cc
+++ b/src/arch/x86/process.cc
@@ -48,7 +48,6 @@
#include "arch/x86/isa_traits.hh"
#include "arch/x86/regs/misc.hh"
#include "arch/x86/regs/segment.hh"
-#include "arch/x86/system.hh"
#include "arch/x86/types.hh"
#include "base/loader/elf_object.hh"
#include "base/loader/object_file.hh"
diff --git a/src/arch/x86/system.cc b/src/arch/x86/system.cc
deleted file mode 100644
index 9b4c842..0000000
--- a/src/arch/x86/system.cc
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * Copyright (c) 2007 The Hewlett-Packard Development Company
- * Copyright (c) 2018 TU Dresden
- * All rights reserved.
- *
- * The license below extends only to copyright in the software and shall
- * not be construed as granting a license to any other intellectual
- * property including but not limited to intellectual property relating
- * to a hardware implementation of the functionality of the software
- * licensed hereunder. You may use the software subject to the license
- * terms below provided that you ensure that this notice is replicated
- * unmodified and in its entirety in all distributions of the software,
- * modified or unmodified, in source code or in binary form.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "arch/x86/system.hh"
-
-#include "params/X86System.hh"
-
-X86System *
-X86SystemParams::create()
-{
- return new X86System(this);
-}
diff --git a/src/arch/x86/system.hh b/src/arch/x86/system.hh
deleted file mode 100644
index 6cb0b2b..0000000
--- a/src/arch/x86/system.hh
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * Copyright (c) 2007 The Hewlett-Packard Development Company
- * All rights reserved.
- *
- * The license below extends only to copyright in the software and shall
- * not be construed as granting a license to any other intellectual
- * property including but not limited to intellectual property relating
- * to a hardware implementation of the functionality of the software
- * licensed hereunder. You may use the software subject to the license
- * terms below provided that you ensure that this notice is replicated
- * unmodified and in its entirety in all distributions of the software,
- * modified or unmodified, in source code or in binary form.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __ARCH_X86_SYSTEM_HH__
-#define __ARCH_X86_SYSTEM_HH__
-
-#include "params/X86System.hh"
-#include "sim/system.hh"
-
-class X86System : public System
-{
- public:
- using System::System;
- Addr fixFuncEventAddr(Addr addr) override { return addr; }
-};
-
-#endif // __ARCH_X86_SYSTEM_HH__
diff --git a/src/arch/x86/tlb.hh b/src/arch/x86/tlb.hh
index f0a671f..2a8cabf 100644
--- a/src/arch/x86/tlb.hh
+++ b/src/arch/x86/tlb.hh
@@ -46,6 +46,7 @@
#include "base/trie.hh"
#include "mem/request.hh"
#include "params/X86TLB.hh"
+#include "sim/stats.hh"
class ThreadContext;
diff --git a/src/mem/multi_level_page_table.hh
b/src/mem/multi_level_page_table.hh
index fbfb0fb..68a32b1 100644
--- a/src/mem/multi_level_page_table.hh
+++ b/src/mem/multi_level_page_table.hh
@@ -38,8 +38,7 @@
#include "base/types.hh"
#include "mem/page_table.hh"
-
-class System;
+#include "sim/system.hh"
/**
* This class implements an in-memory multi-level page table that can be
diff --git a/src/sim/SConscript b/src/sim/SConscript
index 0057d28..703b8e1 100644
--- a/src/sim/SConscript
+++ b/src/sim/SConscript
@@ -53,7 +53,6 @@
Source('init.cc', add_tags='python')
Source('init_signals.cc')
Source('main.cc', tags='main')
-Source('workload.cc')
Source('kernel_workload.cc')
Source('port.cc')
Source('python.cc', add_tags='python')
diff --git a/src/sim/system.hh b/src/sim/system.hh
index 09ba7b4..7d7f964 100644
--- a/src/sim/system.hh
+++ b/src/sim/system.hh
@@ -434,16 +434,6 @@
void workItemEnd(uint32_t tid, uint32_t workid);
- /**
- * Fix up an address used to match PCs for hooking simulator
- * events on to target function executions. See comment in
- * system.cc for details.
- */
- virtual Addr fixFuncEventAddr(Addr addr)
- {
- panic("Base fixFuncEventAddr not implemented.\n");
- }
-
public:
std::vector<BaseRemoteGDB *> remoteGDB;
bool breakpoint();
diff --git a/src/sim/workload.cc b/src/sim/workload.cc
deleted file mode 100644
index 06773f9..0000000
--- a/src/sim/workload.cc
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * Copyright 2019 Google Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "sim/workload.hh"
-
-#include "params/Workload.hh"
-#include "sim/system.hh"
-
-Addr
-Workload::fixFuncEventAddr(Addr addr)
-{
- return system->fixFuncEventAddr(addr);
-}
diff --git a/src/sim/workload.hh b/src/sim/workload.hh
index 2dbcaa0..bde138e 100644
--- a/src/sim/workload.hh
+++ b/src/sim/workload.hh
@@ -39,7 +39,7 @@
class Workload : public SimObject
{
protected:
- Addr fixFuncEventAddr(Addr);
+ virtual Addr fixFuncEventAddr(Addr addr) const { return addr; }
public:
using SimObject::SimObject;
--
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Gerrit-Project: public/gem5
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Gerrit-Change-Id: I81b6c4db14b612bff8840157cfc56393370095e2
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Gerrit-PatchSet: 27
Gerrit-Owner: Gabe Black <gabebl...@google.com>
Gerrit-Reviewer: Alec Roelke <alec.roe...@gmail.com>
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