[gem5-dev] Change in gem5/gem5[develop]: arch-arm, mem-ruby, sim: Add missing overrides

[Nikos Nikoleris (Gerrit) via gem5-dev]

Nikos Nikoleris has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/28168 )

Change subject: arch-arm, mem-ruby, sim: Add missing overrides
......................................................................
arch-arm, mem-ruby, sim: Add missing overrides

Change-Id: I5ab18960bd61953e68777746426adb657818f825
Signed-off-by: Nikos Nikoleris <nikos.nikole...@arm.com>
Reviewed-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/28168
Reviewed-by: Jason Lowe-Power <power...@gmail.com>
Maintainer: Jason Lowe-Power <power...@gmail.com>
Tested-by: kokoro <noreply+kok...@google.com>
---
M src/arch/arm/isa.hh
M src/mem/ruby/system/GPUCoalescer.hh
M src/mem/ruby/system/Sequencer.hh
M src/sim/kernel_workload.hh
4 files changed, 15 insertions(+), 15 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh
index 5fec2db..b4fbbbf 100644
--- a/src/arch/arm/isa.hh
+++ b/src/arch/arm/isa.hh
@@ -726,14 +726,14 @@
                                            unsigned eCount);

         void
-        serialize(CheckpointOut &cp) const
+        serialize(CheckpointOut &cp) const override
         {
             DPRINTF(Checkpoint, "Serializing Arm Misc Registers\n");
             SERIALIZE_ARRAY(miscRegs, NUM_PHYS_MISCREGS);
         }

         void
-        unserialize(CheckpointIn &cp)
+        unserialize(CheckpointIn &cp) override
         {
             DPRINTF(Checkpoint, "Unserializing Arm Misc Registers\n");
             UNSERIALIZE_ARRAY(miscRegs, NUM_PHYS_MISCREGS);
diff --git a/src/mem/ruby/system/GPUCoalescer.hh  
b/src/mem/ruby/system/GPUCoalescer.hh
index 620b5ee..1321173 100644
--- a/src/mem/ruby/system/GPUCoalescer.hh
+++ b/src/mem/ruby/system/GPUCoalescer.hh
@@ -102,9 +102,9 @@
     void wakeup(); // Used only for deadlock detection

     void printProgress(std::ostream& out) const;
-    void resetStats();
+    void resetStats() override;
     void collateStats();
-    void regStats();
+    void regStats() override;

     void writeCallback(Addr address, DataBlock& data);

@@ -157,18 +157,18 @@
     void recordCPWriteCallBack(MachineID myMachID, MachineID senderMachID);

     // Alternate implementations in VIPER Coalescer
-    virtual RequestStatus makeRequest(PacketPtr pkt);
+    virtual RequestStatus makeRequest(PacketPtr pkt) override;

-    int outstandingCount() const { return m_outstanding_count; }
+    int outstandingCount() const override { return m_outstanding_count; }

     bool
-    isDeadlockEventScheduled() const
+    isDeadlockEventScheduled() const override
     {
         return deadlockCheckEvent.scheduled();
     }

     void
-    descheduleDeadlockEvent()
+    descheduleDeadlockEvent() override
     {
         deschedule(deadlockCheckEvent);
     }
diff --git a/src/mem/ruby/system/Sequencer.hh  
b/src/mem/ruby/system/Sequencer.hh
index 0569478..bb2819b 100644
--- a/src/mem/ruby/system/Sequencer.hh
+++ b/src/mem/ruby/system/Sequencer.hh
@@ -86,9 +86,9 @@

     // Public Methods
     void wakeup(); // Used only for deadlock detection
-    void resetStats();
+    void resetStats() override;
     void collateStats();
-    void regStats();
+    void regStats() override;

     void writeCallback(Addr address,
                        DataBlock& data,
@@ -106,14 +106,14 @@
                       const Cycles forwardRequestTime = Cycles(0),
                       const Cycles firstResponseTime = Cycles(0));

-    RequestStatus makeRequest(PacketPtr pkt);
+    RequestStatus makeRequest(PacketPtr pkt) override;
     bool empty() const;
-    int outstandingCount() const { return m_outstanding_count; }
+    int outstandingCount() const override { return m_outstanding_count; }

-    bool isDeadlockEventScheduled() const
+    bool isDeadlockEventScheduled() const override
     { return deadlockCheckEvent.scheduled(); }

-    void descheduleDeadlockEvent()
+    void descheduleDeadlockEvent() override
     { deschedule(deadlockCheckEvent); }

     void print(std::ostream& out) const;
diff --git a/src/sim/kernel_workload.hh b/src/sim/kernel_workload.hh
index 972a539..b88051a 100644
--- a/src/sim/kernel_workload.hh
+++ b/src/sim/kernel_workload.hh
@@ -98,7 +98,7 @@
     }

     bool
-    insertSymbol(Addr address, const std::string &symbol)
+    insertSymbol(Addr address, const std::string &symbol) override
     {
         return kernelSymtab->insert(address, symbol);
     }

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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I5ab18960bd61953e68777746426adb657818f825
Gerrit-Change-Number: 28168
Gerrit-PatchSet: 3
Gerrit-Owner: Nikos Nikoleris <nikos.nikole...@arm.com>
Gerrit-Reviewer: Bobby R. Bruce <bbr...@ucdavis.edu>
Gerrit-Reviewer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Jason Lowe-Power <power...@gmail.com>
Gerrit-Reviewer: Nikos Nikoleris <nikos.nikole...@arm.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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