Hello Michael LeBeane, Tony Gutierrez,
I'd like you to do a code review. Please visit
https://gem5-review.googlesource.com/c/public/gem5/+/29959
to review the following change.
Change subject: gpu_compute: Support loading BLIT kernels
......................................................................
gpu_compute: Support loading BLIT kernels
The BLIT kernels used to implement DMA through the shaders don't fill
out all of the standard fields in an amd_kernel_code_t object. This
patch modifies the code object parsing logic to support these new
kernels.
BLIT kernels are used in APUs when using ROCm memcopies for certain size
buffers, and are used for dGPUs when the SDMA engines are disabled.
Change-Id: Id4e667474d05e311097dbec443def07dfad14a79
---
M src/gpu-compute/gpu_command_processor.cc
M src/gpu-compute/hsa_queue_entry.hh
2 files changed, 31 insertions(+), 4 deletions(-)
diff --git a/src/gpu-compute/gpu_command_processor.cc
b/src/gpu-compute/gpu_command_processor.cc
index b5e9452..aee3e1b 100644
--- a/src/gpu-compute/gpu_command_processor.cc
+++ b/src/gpu-compute/gpu_command_processor.cc
@@ -100,11 +100,25 @@
machine_code_addr);
Addr kern_name_addr(0);
- virt_proxy.readBlob(akc.runtime_loader_kernel_symbol + 0x10,
- (uint8_t*)&kern_name_addr, 0x8);
-
std::string kernel_name;
- virt_proxy.readString(kernel_name, kern_name_addr);
+
+ /**
+ * BLIT kernels don't have symbol names. BLIT kernels are built-in
compute
+ * kernels issued by ROCm to handle DMAs for dGPUs when the SDMA
+ * hardware engines are unavailable or explicitly disabled. They can
also
+ * be used to do copies that ROCm things would be better performed
+ * by the shader than the SDMA engines. They are also sometimes used
on
+ * APUs to implement asynchronous memcopy operations from 2 pointers in
+ * host memory. I have no idea what BLIT stands for.
+ * */
+ if (akc.runtime_loader_kernel_symbol) {
+ virt_proxy.readBlob(akc.runtime_loader_kernel_symbol + 0x10,
+ (uint8_t*)&kern_name_addr, 0x8);
+
+ virt_proxy.readString(kernel_name, kern_name_addr);
+ } else {
+ kernel_name = "Blit kernel";
+ }
DPRINTF(GPUKernelInfo, "Kernel name: %s\n", kernel_name.c_str());
diff --git a/src/gpu-compute/hsa_queue_entry.hh
b/src/gpu-compute/hsa_queue_entry.hh
index a6917db..5fc5e56 100644
--- a/src/gpu-compute/hsa_queue_entry.hh
+++ b/src/gpu-compute/hsa_queue_entry.hh
@@ -88,6 +88,19 @@
_globalWgId(0), dispatchComplete(false)
{
+ // Precompiled BLIT kernels actually violate the spec a bit
+ // and don't set many of the required akc fields. For these
kernels,
+ // we need to rip register usage from the resource registers.
+ //
+ // We can't get an exact number of registers from the resource
+ // registers because they round, but we can get an upper bound on
it
+ if (!numVgprs)
+ numVgprs = (akc->granulated_workitem_vgpr_count + 1) * 4;
+
+ // TODO: Granularity changes for GFX9!
+ if (!numSgprs)
+ numSgprs = (akc->granulated_wavefront_sgpr_count + 1) * 8;
+
initialVgprState.reset();
initialSgprState.reset();
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/29959
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Id4e667474d05e311097dbec443def07dfad14a79
Gerrit-Change-Number: 29959
Gerrit-PatchSet: 1
Gerrit-Owner: Anthony Gutierrez <[email protected]>
Gerrit-Reviewer: Michael LeBeane <[email protected]>
Gerrit-Reviewer: Tony Gutierrez <[email protected]>
Gerrit-MessageType: newchange
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