Nikos Nikoleris has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/30055 )

Change subject: mem: Fix latency handling in MemDelay
......................................................................

mem: Fix latency handling in MemDelay

MemDelay wouldn't consume pre-existing delays in the packet and
therefore the latency it adds would overlap with them. This patch
fixes the MemDelay to properly account for them.

Change-Id: I7330fbf1c8161a21523a0b4aab31c72e34bce650
Signed-off-by: Nikos Nikoleris <nikos.nikole...@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30055
Reviewed-by: Daniel Carvalho <oda...@yahoo.com.br>
Reviewed-by: Andreas Sandberg <andreas.sandb...@arm.com>
Maintainer: Andreas Sandberg <andreas.sandb...@arm.com>
Tested-by: kokoro <noreply+kok...@google.com>
---
M src/mem/mem_delay.cc
1 file changed, 14 insertions(+), 3 deletions(-)

Approvals:
  Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
  Daniel Carvalho: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/mem/mem_delay.cc b/src/mem/mem_delay.cc
index 83177fd..9adc072 100644
--- a/src/mem/mem_delay.cc
+++ b/src/mem/mem_delay.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018 ARM Limited
+ * Copyright (c) 2018, 2020 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -87,7 +87,12 @@
 bool
 MemDelay::MasterPort::recvTimingResp(PacketPtr pkt)
 {
-    const Tick when = curTick() + parent.delayResp(pkt);
+    // technically the packet only reaches us after the header delay,
+    // and typically we also need to deserialise any payload
+    const Tick receive_delay = pkt->headerDelay + pkt->payloadDelay;
+    pkt->headerDelay = pkt->payloadDelay = 0;
+
+    const Tick when = curTick() + parent.delayResp(pkt) + receive_delay;

     parent.slavePort.schedTimingResp(pkt, when);

@@ -136,7 +141,13 @@
 bool
 MemDelay::SlavePort::recvTimingReq(PacketPtr pkt)
 {
-    const Tick when = curTick() + parent.delayReq(pkt);
+    // technically the packet only reaches us after the header
+    // delay, and typically we also need to deserialise any
+    // payload
+    Tick receive_delay = pkt->headerDelay + pkt->payloadDelay;
+    pkt->headerDelay = pkt->payloadDelay = 0;
+
+    const Tick when = curTick() + parent.delayReq(pkt) + receive_delay;

     parent.masterPort.schedTimingReq(pkt, when);


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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I7330fbf1c8161a21523a0b4aab31c72e34bce650
Gerrit-Change-Number: 30055
Gerrit-PatchSet: 3
Gerrit-Owner: Nikos Nikoleris <nikos.nikole...@arm.com>
Gerrit-Assignee: Andreas Sandberg <andreas.sandb...@arm.com>
Gerrit-Reviewer: Andreas Sandberg <andreas.sandb...@arm.com>
Gerrit-Reviewer: Daniel Carvalho <oda...@yahoo.com.br>
Gerrit-Reviewer: Nikos Nikoleris <nikos.nikole...@arm.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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