Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/31615 )
Change subject: dev-arm: Check for security attribute when writing to ICFGR
registers
......................................................................
dev-arm: Check for security attribute when writing to ICFGR registers
This is matching the GICD_ICFGR read; a non secure access to a secure
interrupt should be treated as RAZ/WI
Change-Id: I9e92e03c13fe0474ed139b0ed22cebd5847b9109
Signed-off-by: Giacomo Travaglini <[email protected]>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31615
Reviewed-by: Andreas Sandberg <[email protected]>
Maintainer: Andreas Sandberg <[email protected]>
Tested-by: kokoro <[email protected]>
---
M src/dev/arm/gic_v3_distributor.cc
1 file changed, 5 insertions(+), 0 deletions(-)
Approvals:
Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/dev/arm/gic_v3_distributor.cc
b/src/dev/arm/gic_v3_distributor.cc
index 485ba72..f8605da 100644
--- a/src/dev/arm/gic_v3_distributor.cc
+++ b/src/dev/arm/gic_v3_distributor.cc
@@ -743,6 +743,11 @@
for (int i = 0, int_id = first_intid; i < 8 * size && int_id <
itLines;
i = i + 2, int_id++) {
+
+ if (nsAccessToSecInt(int_id, is_secure_access)) {
+ continue;
+ }
+
irqConfig[int_id] = data & (0x2 << i) ?
Gicv3::INT_EDGE_TRIGGERED :
Gicv3::INT_LEVEL_SENSITIVE;
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I9e92e03c13fe0474ed139b0ed22cebd5847b9109
Gerrit-Change-Number: 31615
Gerrit-PatchSet: 4
Gerrit-Owner: Giacomo Travaglini <[email protected]>
Gerrit-Reviewer: Andreas Sandberg <[email protected]>
Gerrit-Reviewer: Giacomo Travaglini <[email protected]>
Gerrit-Reviewer: kokoro <[email protected]>
Gerrit-MessageType: merged
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