Hello Andreas Sandberg, Adrian Herrera,
I'd like you to do a code review. Please visit
https://gem5-review.googlesource.com/c/public/gem5/+/31775
to review the following change.
Change subject: dev-arm: Fix <timer>_CTL_EL<x>.ISTATUS when masking the irq
......................................................................
dev-arm: Fix <timer>_CTL_EL<x>.ISTATUS when masking the irq
According to the ArmArm:
"When the value of the ENABLE bit is 1, ISTATUS indicates whether the
timer condition is met. ISTATUS takes no account of the value of the
IMASK bit. If the value of ISTATUS is 1 and the value of IMASK is 0 then
the timer interrupt is asserted."
Since ISTATUS is simply flagging that timer conditions are met, an
interrupt mask (via the <timer>_CTL_EL<x>.IMASK) shouldn't reset the
field to 0.
Clearing the ISTATUS bit leads to the following problem
as an example:
1) virtual timer (EL1) issuing a physical interrupt to the GIC
2) hypervisor handling the physical interrupt; setting the
CNTV_CTL_EL0.IMASK to 1 before issuing the virtual interrupt
to the VM
3) The VM receives the virtual interrupt but it gets confused
since CNTV_CTL_EL0.ISTATUS is 0 (due to point 2)
What happens when we disable the timer?
"When the value of the ENABLE bit is 0, the ISTATUS field is UNKNOWN."
So we are allowed to not clear the ISTATUS bit if the timer gets
disabled
Change-Id: I8eb32459a3ef6829c1910cf63815e102e2705566
Signed-off-by: Giacomo Travaglini <[email protected]>
Reviewed-by: Andreas Sandberg <[email protected]>
Reviewed-by: Adrian Herrera <[email protected]>
---
M src/dev/arm/generic_timer.cc
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/dev/arm/generic_timer.cc b/src/dev/arm/generic_timer.cc
index bf6cd4e..4cc187c 100644
--- a/src/dev/arm/generic_timer.cc
+++ b/src/dev/arm/generic_timer.cc
@@ -322,8 +322,11 @@
(old_ctl.enable && !new_ctl.enable)) {
if (_control.istatus) {
DPRINTF(Timer, "Clearing interrupt\n");
+ // We are clearing the interrupt but we are not
+ // setting istatus to 0 as we are doing in the updateCounter
+ // istatus signals that Timer conditions are met.
+ // It shouldn't depend on masking
_interrupt->clear();
- _control.istatus = 0;
}
}
}
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I8eb32459a3ef6829c1910cf63815e102e2705566
Gerrit-Change-Number: 31775
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini <[email protected]>
Gerrit-Reviewer: Adrian Herrera <[email protected]>
Gerrit-Reviewer: Andreas Sandberg <[email protected]>
Gerrit-MessageType: newchange
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