[gem5-dev] Change in gem5/gem5[develop]: mem: Adjust interface to new DRAMSim build

[Mahyar Samani (Gerrit) via gem5-dev]

Mahyar Samani has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/31859 )

Change subject: mem: Adjust interface to new DRAMSim build
......................................................................

mem: Adjust interface to new DRAMSim build

Change-Id: Iab1d626e18c5ea099ed994456c93eb13f3e0d46a
---
M src/mem/dramsim3.cc
M src/mem/dramsim3_wrapper.cc
M src/mem/dramsim3_wrapper.hh
3 files changed, 8 insertions(+), 8 deletions(-)



diff --git a/src/mem/dramsim3.cc b/src/mem/dramsim3.cc
index 6d37567..e9b239c 100644
--- a/src/mem/dramsim3.cc
+++ b/src/mem/dramsim3.cc
@@ -221,14 +221,14 @@
     if (can_accept) {
         // we should never have a situation when we think there is space,
         // and there isn't
-        assert(wrapper.canAccept());
+        assert(wrapper.canAccept(pkt->getAddr(), pkt->isWrite()));

         DPRINTF(DRAMSim3, "Enqueueing address %lld\n", pkt->getAddr());

         // @todo what about the granularity here, implicit assumption that
         // a transaction matches the burst size of the memory (which we
         // cannot determine without parsing the ini file ourselves)
-        wrapper.enqueue(pkt->isWrite(), pkt->getAddr());
+        wrapper.enqueue(pkt->getAddr(), pkt->isWrite());

         return true;
     } else {
diff --git a/src/mem/dramsim3_wrapper.cc b/src/mem/dramsim3_wrapper.cc
index 08f78aa..1b4aefc 100644
--- a/src/mem/dramsim3_wrapper.cc
+++ b/src/mem/dramsim3_wrapper.cc
@@ -110,15 +110,15 @@
 }

 bool
-DRAMSim3Wrapper::canAccept() const
+DRAMSim3Wrapper::canAccept(uint64_t addr, bool is_write) const
 {
-    return dramsim->IsInsertable();
+    return dramsim->WillAcceptTransaction(addr, is_write);
 }

 void
-DRAMSim3Wrapper::enqueue(bool is_write, uint64_t addr)
+DRAMSim3Wrapper::enqueue(uint64_t addr, bool is_write)
 {
-    bool success M5_VAR_USED = dramsim->InsertRequest(is_write, addr);
+    bool success M5_VAR_USED = dramsim->AddTransaction(addr, is_write);
     assert(success);
 }

diff --git a/src/mem/dramsim3_wrapper.hh b/src/mem/dramsim3_wrapper.hh
index 03e0ad5..f073327 100644
--- a/src/mem/dramsim3_wrapper.hh
+++ b/src/mem/dramsim3_wrapper.hh
@@ -116,14 +116,14 @@
      *
      * @return true if the controller can accept transactions
      */
-    bool canAccept() const;
+    bool canAccept(uint64_t addr, bool is_write) const;

     /**
      * Enqueue a packet. This assumes that canAccept has returned true.
      *
      * @param pkt Packet to turn into a DRAMSim3 transaction
      */
-    void enqueue(bool is_write, uint64_t addr);
+    void enqueue(uint64_t addr, bool is_write);

     /**
      * Get the internal clock period used by DRAMSim3, specified in

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Iab1d626e18c5ea099ed994456c93eb13f3e0d46a
Gerrit-Change-Number: 31859
Gerrit-PatchSet: 1
Gerrit-Owner: Mahyar Samani <msam...@ucdavis.edu>
Gerrit-MessageType: newchange
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