[gem5-dev] Change in gem5/gem5[develop]: arch-power: Implement GDB XML target description for PowerPC

Boris Shingarov (Gerrit) via gem5-dev Thu, 06 Aug 2020 08:17:13 -0700

Boris Shingarov has submitted this change. (https://gem5-review.googlesource.com/c/public/gem5/+/31114 )


Change subject: arch-power: Implement GDB XML target description for PowerPC
......................................................................


arch-power: Implement GDB XML target description for PowerPC

Change-Id: I2610626a7e1464316ebaa770291d4bdcb59e8856
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31114
Reviewed-by: Ciro Santilli <ciro.santi...@arm.com>
Reviewed-by: Gabe Black <gabebl...@google.com>
Maintainer: Jason Lowe-Power <power...@gmail.com>
Tested-by: kokoro <noreply+kok...@google.com>
---
A ext/gdb-xml/power.xml
M src/arch/power/SConscript
M src/arch/power/remote_gdb.cc
M src/arch/power/remote_gdb.hh
4 files changed, 118 insertions(+), 0 deletions(-)

Approvals:
  Gabe Black: Looks good to me, but someone else must approve
  Ciro Santilli: Looks good to me, approved
  Jason Lowe-Power: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/ext/gdb-xml/power.xml b/ext/gdb-xml/power.xml
new file mode 100644
index 0000000..da5a07c
--- /dev/null
+++ b/ext/gdb-xml/power.xml
@@ -0,0 +1,92 @@
+<?xml version="1.0"?>
+
+<!--
+GDB feature descriptor defining the structure of the G packet,
+i.e., the representation of register contents on the wire.
+This file does not model any real variant of PowerPC in particular
+(such as, RS/6000 or e500): it simply reflects BaseGdbRegCache's
+fields in power/remote_gdb.hh.
+
+As such, this description is something of an oversimplification
+relative to the XML files in the GDB source, in that it does not
+take into account possible variations in features resulting in
+non-sequential numbering of registers.
+-->
+
+<target>
+  <architecture>powerpc</architecture>
+  <feature name="org.gnu.gdb.power">
+    <reg name="r0" bitsize="32"/>
+    <reg name="r1" bitsize="32"/>
+    <reg name="r2" bitsize="32"/>
+    <reg name="r3" bitsize="32"/>
+    <reg name="r4" bitsize="32"/>
+    <reg name="r5" bitsize="32"/>
+    <reg name="r6" bitsize="32"/>
+    <reg name="r7" bitsize="32"/>
+    <reg name="r8" bitsize="32"/>
+    <reg name="r9" bitsize="32"/>
+    <reg name="r10" bitsize="32"/>
+    <reg name="r11" bitsize="32"/>
+    <reg name="r12" bitsize="32"/>
+    <reg name="r13" bitsize="32"/>
+    <reg name="r14" bitsize="32"/>
+    <reg name="r15" bitsize="32"/>
+    <reg name="r16" bitsize="32"/>
+    <reg name="r17" bitsize="32"/>
+    <reg name="r18" bitsize="32"/>
+    <reg name="r19" bitsize="32"/>
+    <reg name="r20" bitsize="32"/>
+    <reg name="r21" bitsize="32"/>
+    <reg name="r22" bitsize="32"/>
+    <reg name="r23" bitsize="32"/>
+    <reg name="r24" bitsize="32"/>
+    <reg name="r25" bitsize="32"/>
+    <reg name="r26" bitsize="32"/>
+    <reg name="r27" bitsize="32"/>
+    <reg name="r28" bitsize="32"/>
+    <reg name="r29" bitsize="32"/>
+    <reg name="r30" bitsize="32"/>
+    <reg name="r31" bitsize="32"/>
+
+    <reg name="f0" bitsize="64" type="ieee_double" regnum="32"/>
+    <reg name="f1" bitsize="64" type="ieee_double"/>
+    <reg name="f2" bitsize="64" type="ieee_double"/>
+    <reg name="f3" bitsize="64" type="ieee_double"/>
+    <reg name="f4" bitsize="64" type="ieee_double"/>
+    <reg name="f5" bitsize="64" type="ieee_double"/>
+    <reg name="f6" bitsize="64" type="ieee_double"/>
+    <reg name="f7" bitsize="64" type="ieee_double"/>
+    <reg name="f8" bitsize="64" type="ieee_double"/>
+    <reg name="f9" bitsize="64" type="ieee_double"/>
+    <reg name="f10" bitsize="64" type="ieee_double"/>
+    <reg name="f11" bitsize="64" type="ieee_double"/>
+    <reg name="f12" bitsize="64" type="ieee_double"/>
+    <reg name="f13" bitsize="64" type="ieee_double"/>
+    <reg name="f14" bitsize="64" type="ieee_double"/>
+    <reg name="f15" bitsize="64" type="ieee_double"/>
+    <reg name="f16" bitsize="64" type="ieee_double"/>
+    <reg name="f17" bitsize="64" type="ieee_double"/>
+    <reg name="f18" bitsize="64" type="ieee_double"/>
+    <reg name="f19" bitsize="64" type="ieee_double"/>
+    <reg name="f20" bitsize="64" type="ieee_double"/>
+    <reg name="f21" bitsize="64" type="ieee_double"/>
+    <reg name="f22" bitsize="64" type="ieee_double"/>
+    <reg name="f23" bitsize="64" type="ieee_double"/>
+    <reg name="f24" bitsize="64" type="ieee_double"/>
+    <reg name="f25" bitsize="64" type="ieee_double"/>
+    <reg name="f26" bitsize="64" type="ieee_double"/>
+    <reg name="f27" bitsize="64" type="ieee_double"/>
+    <reg name="f28" bitsize="64" type="ieee_double"/>
+    <reg name="f29" bitsize="64" type="ieee_double"/>
+    <reg name="f30" bitsize="64" type="ieee_double"/>
+    <reg name="f31" bitsize="64" type="ieee_double"/>
+
+    <reg name="pc"  bitsize="32" type="code_ptr" regnum="64"/>
+    <reg name="msr" bitsize="32"/>
+    <reg name="cr"  bitsize="32"/>
+    <reg name="lr"  bitsize="32" type="code_ptr"/>
+    <reg name="ctr" bitsize="32"/>
+    <reg name="xer" bitsize="32"/>
+  </feature>
+</target>
diff --git a/src/arch/power/SConscript b/src/arch/power/SConscript
index a91b5d9..1187acf 100644
--- a/src/arch/power/SConscript
+++ b/src/arch/power/SConscript
@@ -1,6 +1,7 @@
 # -*- mode:python -*-

 # Copyright (c) 2009 The University of Edinburgh
+# Copyright (c) 2020 LabWare
 # All rights reserved.
 #
 # Redistribution and use in source and binary forms, with or without
@@ -56,3 +57,5 @@
     DebugFlag('Power')

     ISADesc('isa/main.isa')
+
+    GdbXml('power.xml', 'gdb_xml_power')
diff --git a/src/arch/power/remote_gdb.cc b/src/arch/power/remote_gdb.cc
index ccee0b1..661c431 100644
--- a/src/arch/power/remote_gdb.cc
+++ b/src/arch/power/remote_gdb.cc
@@ -136,6 +136,7 @@

 #include <string>

+#include "blobs/gdb_xml_power.hh"
 #include "cpu/thread_state.hh"
 #include "debug/GDBAcc.hh"
 #include "debug/GDBMisc.hh"
@@ -213,3 +214,19 @@
     return &regCache;
 }

+bool

+RemoteGDB::getXferFeaturesRead(const std::string &annex, std::string&output)

+{
+#define GDB_XML(x, s) \
+        { x, std::string(reinterpret_cast<const char *>(Blobs::s), \
+        Blobs::s ## _len) }
+    static const std::map<std::string, std::string> annexMap {
+        GDB_XML("target.xml", gdb_xml_power),
+    };
+#undef GDB_XML
+    auto it = annexMap.find(annex);
+    if (it == annexMap.end())
+        return false;
+    output = it->second;
+    return true;
+}
diff --git a/src/arch/power/remote_gdb.hh b/src/arch/power/remote_gdb.hh
index 1b673bb..3bb726e 100644
--- a/src/arch/power/remote_gdb.hh
+++ b/src/arch/power/remote_gdb.hh
@@ -76,6 +76,12 @@
   public:
     RemoteGDB(System *_system, ThreadContext *tc, int _port);
     BaseGdbRegCache *gdbRegs();
+    std::vector<std::string>
+    availableFeatures() const
+    {
+        return {"qXfer:features:read+"};
+    };

+ bool getXferFeaturesRead(const std::string &annex, std::string&output);

 };

 } // namespace PowerISA

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I2610626a7e1464316ebaa770291d4bdcb59e8856
Gerrit-Change-Number: 31114
Gerrit-PatchSet: 4
Gerrit-Owner: Boris Shingarov <shinga...@gmail.com>
Gerrit-Reviewer: Andreas Sandberg <andreas.sandb...@arm.com>
Gerrit-Reviewer: Boris Shingarov <shinga...@gmail.com>
Gerrit-Reviewer: Ciro Santilli <ciro.santi...@arm.com>
Gerrit-Reviewer: Gabe Black <gabebl...@google.com>
Gerrit-Reviewer: Jason Lowe-Power <power...@gmail.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged

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[gem5-dev] Change in gem5/gem5[develop]: arch-power: Implement GDB XML target description for PowerPC

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