[gem5-dev] Change in gem5/gem5[develop]: arch: Eliminate the unused HasUnalignedMemAcc constant.

[Gabe Black (Gerrit) via gem5-dev]

Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/32923 )

Change subject: arch: Eliminate the unused HasUnalignedMemAcc constant.
......................................................................

arch: Eliminate the unused HasUnalignedMemAcc constant.

Change-Id: Iaf9346df57336216c09979fe1d931701c6b7ddf6
---
M src/arch/arm/isa_traits.hh
M src/arch/mips/isa_traits.hh
M src/arch/power/isa_traits.hh
M src/arch/riscv/isa_traits.hh
M src/arch/sparc/isa_traits.hh
M src/arch/x86/isa_traits.hh
6 files changed, 0 insertions(+), 17 deletions(-)



diff --git a/src/arch/arm/isa_traits.hh b/src/arch/arm/isa_traits.hh
index 0ce38bc..2f8b634 100644
--- a/src/arch/arm/isa_traits.hh
+++ b/src/arch/arm/isa_traits.hh
@@ -92,9 +92,6 @@

     const uint32_t HighVecs = 0xFFFF0000;

-    // Memory accesses cannot be unaligned
-    const bool HasUnalignedMemAcc = true;
-
     enum InterruptTypes
     {
         INT_RST,
diff --git a/src/arch/mips/isa_traits.hh b/src/arch/mips/isa_traits.hh
index 9b44d86..b97828f 100644
--- a/src/arch/mips/isa_traits.hh
+++ b/src/arch/mips/isa_traits.hh
@@ -136,8 +136,6 @@
 const int ANNOTE_NONE = 0;
 const uint32_t ITOUCH_ANNOTE = 0xffffffff;

-const bool HasUnalignedMemAcc = true;
-
 } // namespace MipsISA

 #endif // __ARCH_MIPS_ISA_TRAITS_HH__
diff --git a/src/arch/power/isa_traits.hh b/src/arch/power/isa_traits.hh
index 89bfa6b..0c82af2 100644
--- a/src/arch/power/isa_traits.hh
+++ b/src/arch/power/isa_traits.hh
@@ -54,9 +54,6 @@

 const int MachineBytes = 4;

-// Memory accesses can be unaligned
-const bool HasUnalignedMemAcc = true;
-
 } // namespace PowerISA

 #endif // __ARCH_POWER_ISA_TRAITS_HH__
diff --git a/src/arch/riscv/isa_traits.hh b/src/arch/riscv/isa_traits.hh
index 8ba2e0c..a228a90 100644
--- a/src/arch/riscv/isa_traits.hh
+++ b/src/arch/riscv/isa_traits.hh
@@ -54,9 +54,6 @@
 const Addr PageShift = 12;
 const Addr PageBytes = ULL(1) << PageShift;

-// Memory accesses can be unaligned (at least for double-word memory  
accesses)
-const bool HasUnalignedMemAcc = true;
-
 }

 #endif //__ARCH_RISCV_ISA_TRAITS_HH__
diff --git a/src/arch/sparc/isa_traits.hh b/src/arch/sparc/isa_traits.hh
index 7989107..ad9cf08 100644
--- a/src/arch/sparc/isa_traits.hh
+++ b/src/arch/sparc/isa_traits.hh
@@ -44,9 +44,6 @@

 StaticInstPtr decodeInst(ExtMachInst);

-// Memory accesses cannot be unaligned
-const bool HasUnalignedMemAcc = false;
-
 }

 #endif // __ARCH_SPARC_ISA_TRAITS_HH__
diff --git a/src/arch/x86/isa_traits.hh b/src/arch/x86/isa_traits.hh
index 98a2dc8..1f7a590 100644
--- a/src/arch/x86/isa_traits.hh
+++ b/src/arch/x86/isa_traits.hh
@@ -49,9 +49,6 @@

     const Addr PageShift = 12;
     const Addr PageBytes = ULL(1) << PageShift;
-
-    // Memory accesses can be unaligned
-    const bool HasUnalignedMemAcc = true;
 }

 #endif // __ARCH_X86_ISATRAITS_HH__

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/32923
To unsubscribe, or for help writing mail filters, visit  
https://gem5-review.googlesource.com/settings

Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Iaf9346df57336216c09979fe1d931701c6b7ddf6
Gerrit-Change-Number: 32923
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <gabebl...@google.com>
Gerrit-MessageType: newchange
_______________________________________________
gem5-dev mailing list -- gem5-dev@gem5.org
To unsubscribe send an email to gem5-dev-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s