Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/33282 )
Change subject: arch,cpu,sim: Route system calls through the workload.
......................................................................
arch,cpu,sim: Route system calls through the workload.
System calls should now be requested from the workload directly and not
routed through ExecContext or ThreadContext interfaces. That removes a
major special case for SE mode from those interfaces.
For now, when the SE workload gets a request for a system call, it
dispatches it to the appropriate Process object. In the future, the
ISA specific Workload subclasses will be responsible for handling system
calls and not the Process classes.
For simplicity, the Workload syscall() method is defined in the base
class but will panic everywhere except when SEWorkload overrides it. In
the future, this mechanism will turn into a way to request generic
services from the workload which are not necessarily system calls. For
instance, it could be a way to request handling of a page fault without
having to have another PseudoInst just for that purpose.
Change-Id: I18d36d64c54adf4f4f17a62e7e006ff2fc0b22f1
---
M src/arch/arm/faults.cc
M src/arch/riscv/faults.cc
M src/arch/sparc/linux/process.cc
M src/cpu/checker/cpu.hh
M src/cpu/checker/thread_context.hh
M src/cpu/exec_context.hh
M src/cpu/minor/exec_context.hh
M src/cpu/o3/cpu.cc
M src/cpu/o3/cpu.hh
M src/cpu/o3/dyn_inst.hh
M src/cpu/o3/dyn_inst_impl.hh
M src/cpu/o3/thread_context.hh
M src/cpu/o3/thread_state.hh
M src/cpu/simple/exec_context.hh
M src/cpu/simple_thread.hh
M src/cpu/thread_context.hh
M src/sim/faults.cc
M src/sim/pseudo_inst.cc
M src/sim/se_workload.cc
M src/sim/se_workload.hh
M src/sim/workload.hh
21 files changed, 21 insertions(+), 88 deletions(-)
diff --git a/src/arch/arm/faults.cc b/src/arch/arm/faults.cc
index b171add..09f985a 100644
--- a/src/arch/arm/faults.cc
+++ b/src/arch/arm/faults.cc
@@ -862,7 +862,7 @@
// As of now, there isn't a 32 bit thumb version of this instruction.
assert(!machInst.bigThumb);
- tc->syscall();
+ tc->getSystemPtr()->workload->syscall(tc);
// Advance the PC since that won't happen automatically.
PCState pc = tc->pcState();
diff --git a/src/arch/riscv/faults.cc b/src/arch/riscv/faults.cc
index 7a1c7bd..ac4c582 100644
--- a/src/arch/riscv/faults.cc
+++ b/src/arch/riscv/faults.cc
@@ -194,7 +194,7 @@
void
SyscallFault::invokeSE(ThreadContext *tc, const StaticInstPtr &inst)
{
- tc->syscall();
+ tc->getSystemPtr()->workload->syscall(tc);
}
} // namespace RiscvISA
diff --git a/src/arch/sparc/linux/process.cc
b/src/arch/sparc/linux/process.cc
index 79bbaee..ce051ba 100644
--- a/src/arch/sparc/linux/process.cc
+++ b/src/arch/sparc/linux/process.cc
@@ -92,7 +92,7 @@
{
switch (trapNum) {
case 0x10: //Linux 32 bit syscall trap
- tc->syscall();
+ tc->getSystemPtr()->workload->syscall(tc);
break;
default:
SparcProcess::handleTrap(trapNum, tc);
@@ -129,7 +129,7 @@
switch (trapNum) {
// case 0x10: // Linux 32 bit syscall trap
case 0x6d: // Linux 64 bit syscall trap
- tc->syscall();
+ tc->getSystemPtr()->workload->syscall(tc);
break;
case 0x6e: // Linux 64 bit getcontext trap
getContext(tc);
diff --git a/src/cpu/checker/cpu.hh b/src/cpu/checker/cpu.hh
index 13cd609..32e1d5c 100644
--- a/src/cpu/checker/cpu.hh
+++ b/src/cpu/checker/cpu.hh
@@ -575,9 +575,6 @@
/////////////////////////////////////////////////////
void wakeup(ThreadID tid) override { }
- // Assume that the normal CPU's call to syscall was successful.
- // The checker's state would have already been updated by the syscall.
- void syscall() override { }
void
handleError()
diff --git a/src/cpu/checker/thread_context.hh
b/src/cpu/checker/thread_context.hh
index e98b3a2..5599527 100644
--- a/src/cpu/checker/thread_context.hh
+++ b/src/cpu/checker/thread_context.hh
@@ -171,9 +171,6 @@
actualTC->connectMemPorts(tc);
}
- /** Executes a syscall in SE mode. */
- void syscall() override { return actualTC->syscall(); }
-
Status status() const override { return actualTC->status(); }
void
diff --git a/src/cpu/exec_context.hh b/src/cpu/exec_context.hh
index 4180191..c515a5e 100644
--- a/src/cpu/exec_context.hh
+++ b/src/cpu/exec_context.hh
@@ -295,18 +295,6 @@
/** @} */
- /**
- * @{
- * @name SysCall Emulation Interfaces
- */
-
- /**
- * Executes a syscall.
- */
- virtual void syscall() = 0;
-
- /** @} */
-
/** Returns a pointer to the ThreadContext. */
virtual ThreadContext *tcBase() const = 0;
diff --git a/src/cpu/minor/exec_context.hh b/src/cpu/minor/exec_context.hh
index e65fdfb..83ac1a6 100644
--- a/src/cpu/minor/exec_context.hh
+++ b/src/cpu/minor/exec_context.hh
@@ -379,8 +379,6 @@
return thread.setMiscReg(reg.index(), val);
}
- void syscall() override { thread.syscall(); }
-
ThreadContext *tcBase() const override { return thread.getTC(); }
/* @todo, should make stCondFailures persistent somewhere */
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index d0a387c..89142cf 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -915,26 +915,6 @@
template <class Impl>
void
-FullO3CPU<Impl>::syscall(ThreadID tid)
-{
- DPRINTF(O3CPU, "[tid:%i] Executing syscall().\n\n", tid);
-
- DPRINTF(Activity,"Activity: syscall() called.\n");
-
- // Temporarily increase this by one to account for the syscall
- // instruction.
- ++(this->thread[tid]->funcExeInst);
-
- // Execute the actual syscall.
- this->thread[tid]->syscall();
-
- // Decrease funcExeInst by one as the normal commit will handle
- // incrementing it.
- --(this->thread[tid]->funcExeInst);
-}
-
-template <class Impl>
-void
FullO3CPU<Impl>::serializeThread(CheckpointOut &cp, ThreadID tid) const
{
thread[tid]->serialize(cp);
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index cc0e2cd..9af8c85 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -277,11 +277,6 @@
void exitThreads();
public:
- /** Executes a syscall.
- * @todo: Determine if this needs to be virtual.
- */
- void syscall(ThreadID tid);
-
/** Starts draining the CPU's pipeline of all instructions in
* order to stop all memory accesses. */
DrainState drain() override;
diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh
index e72b786..a2a8469 100644
--- a/src/cpu/o3/dyn_inst.hh
+++ b/src/cpu/o3/dyn_inst.hh
@@ -249,9 +249,6 @@
/** Traps to handle specified fault. */
void trap(const Fault &fault);
- /** Emulates a syscall. */
- void syscall() override;
-
public:
// The register accessor methods provide the index of the
diff --git a/src/cpu/o3/dyn_inst_impl.hh b/src/cpu/o3/dyn_inst_impl.hh
index 537c8a3..f9421fb 100644
--- a/src/cpu/o3/dyn_inst_impl.hh
+++ b/src/cpu/o3/dyn_inst_impl.hh
@@ -188,19 +188,4 @@
this->cpu->trap(fault, this->threadNumber, this->staticInst);
}
-template <class Impl>
-void
-BaseO3DynInst<Impl>::syscall()
-{
- // HACK: check CPU's nextPC before and after syscall. If it
- // changes, update this instruction's nextPC because the syscall
- // must have changed the nextPC.
- TheISA::PCState curPC = this->cpu->pcState(this->threadNumber);
- this->cpu->syscall(this->threadNumber);
- TheISA::PCState newPC = this->cpu->pcState(this->threadNumber);
- if (!(curPC == newPC)) {
- this->pcState(newPC);
- }
-}
-
#endif//__CPU_O3_DYN_INST_IMPL_HH__
diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh
index e3e11fe..a86bebf 100644
--- a/src/cpu/o3/thread_context.hh
+++ b/src/cpu/o3/thread_context.hh
@@ -419,13 +419,6 @@
thread->storeCondFailures = sc_failures;
}
- /** Executes a syscall in SE mode. */
- void
- syscall() override
- {
- return cpu->syscall(thread->threadId());
- }
-
/** Reads the funcExeInst counter. */
Counter readFuncExeInst() const override { return thread->funcExeInst;
}
diff --git a/src/cpu/o3/thread_state.hh b/src/cpu/o3/thread_state.hh
index 6420da9..83a7978 100644
--- a/src/cpu/o3/thread_state.hh
+++ b/src/cpu/o3/thread_state.hh
@@ -125,9 +125,6 @@
/** Returns a pointer to the TC of this thread. */
ThreadContext *getTC() { return tc; }
-
- /** Handles the syscall. */
- void syscall() { process->syscall(tc); }
};
#endif // __CPU_O3_THREAD_STATE_HH__
diff --git a/src/cpu/simple/exec_context.hh b/src/cpu/simple/exec_context.hh
index 5214211..fbf2bf0 100644
--- a/src/cpu/simple/exec_context.hh
+++ b/src/cpu/simple/exec_context.hh
@@ -491,11 +491,6 @@
return thread->readStCondFailures();
}
- /**
- * Executes a syscall specified by the callnum.
- */
- void syscall() override { thread->syscall(); }
-
/** Returns a pointer to the ThreadContext. */
ThreadContext *tcBase() const override { return thread->getTC(); }
diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh
index 25f13dd..ba4cf72 100644
--- a/src/cpu/simple_thread.hh
+++ b/src/cpu/simple_thread.hh
@@ -577,8 +577,6 @@
return ThreadState::readFuncExeInst();
}
- void syscall() override { process->syscall(this); }
-
RegVal readIntRegFlat(RegIndex idx) const override { return
intRegs[idx]; }
void
setIntRegFlat(RegIndex idx, RegVal val) override
diff --git a/src/cpu/thread_context.hh b/src/cpu/thread_context.hh
index 6662502..9cc69ee 100644
--- a/src/cpu/thread_context.hh
+++ b/src/cpu/thread_context.hh
@@ -293,8 +293,6 @@
// Same with st cond failures.
virtual Counter readFuncExeInst() const = 0;
- virtual void syscall() = 0;
-
// This function exits the thread context in the CPU and returns
// 1 if the CPU has no more active threads (meaning it's OK to exit);
// Used in syscall-emulation mode when a thread calls the exit
syscall.
diff --git a/src/sim/faults.cc b/src/sim/faults.cc
index 136d2ee..e05a0a8 100644
--- a/src/sim/faults.cc
+++ b/src/sim/faults.cc
@@ -54,7 +54,7 @@
void
SESyscallFault::invoke(ThreadContext *tc, const StaticInstPtr &inst)
{
- tc->syscall();
+ tc->getSystemPtr()->workload->syscall(tc);
// Move the PC forward since that doesn't happen automatically.
TheISA::PCState pc = tc->pcState();
inst->advancePC(pc);
diff --git a/src/sim/pseudo_inst.cc b/src/sim/pseudo_inst.cc
index 7335fda..90db4bb 100644
--- a/src/sim/pseudo_inst.cc
+++ b/src/sim/pseudo_inst.cc
@@ -479,7 +479,7 @@
m5Syscall(ThreadContext *tc)
{
DPRINTF(PseudoInst, "PseudoInst::m5Syscall()\n");
- tc->syscall();
+ tc->getSystemPtr()->workload->syscall(tc);
}
void
diff --git a/src/sim/se_workload.cc b/src/sim/se_workload.cc
index f2a01d5..dccd7ca 100644
--- a/src/sim/se_workload.cc
+++ b/src/sim/se_workload.cc
@@ -27,10 +27,17 @@
#include "sim/se_workload.hh"
+#include "cpu/thread_context.hh"
#include "params/SEWorkload.hh"
+#include "sim/process.hh"
SEWorkload::SEWorkload(const Params &p) : Workload(&p), _params(p)
+{}
+
+void
+SEWorkload::syscall(ThreadContext *tc)
{
+ tc->getProcessPtr()->syscall(tc);
}
SEWorkload *
diff --git a/src/sim/se_workload.hh b/src/sim/se_workload.hh
index b72e824..8deb03b 100644
--- a/src/sim/se_workload.hh
+++ b/src/sim/se_workload.hh
@@ -76,6 +76,8 @@
// within it.
panic("No workload symbol table for syscall emulation mode.");
}
+
+ void syscall(ThreadContext *tc) override;
};
#endif // __SIM_SE_WORKLOAD_HH__
diff --git a/src/sim/workload.hh b/src/sim/workload.hh
index 435a24b..7c1b66d 100644
--- a/src/sim/workload.hh
+++ b/src/sim/workload.hh
@@ -69,6 +69,12 @@
virtual const Loader::SymbolTable &symtab(ThreadContext *tc) = 0;
virtual bool insertSymbol(const Loader::Symbol &symbol) = 0;
+ virtual void
+ syscall(ThreadContext *tc)
+ {
+ panic("syscall() not implemented.");
+ }
+
/** @{ */
/**
* Add a function-based event to the given function, to be looked
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I18d36d64c54adf4f4f17a62e7e006ff2fc0b22f1
Gerrit-Change-Number: 33282
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-MessageType: newchange
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