Shivani Parekh has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/33542 )
Change subject: arch-arm: comments
......................................................................
arch-arm: comments
Change-Id: I97f96b4bb69de317cc3e652689dd47f6fcda85a1
---
M src/arch/arm/stage2_mmu.cc
M src/arch/arm/table_walker.hh
M src/arch/arm/tlb.hh
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/arch/arm/stage2_mmu.cc b/src/arch/arm/stage2_mmu.cc
index 1378cf9..6dbb881 100644
--- a/src/arch/arm/stage2_mmu.cc
+++ b/src/arch/arm/stage2_mmu.cc
@@ -52,7 +52,7 @@
_id(p->sys->getMasterId(_stage1Tlb->getTableWalker()))
{
// we use the stage-one table walker as the parent of the port,
- // and to get our master id, this is done to keep things
+ // and to get our unique id, this is done to keep things
// symmetrical with other ISAs in terms of naming and stats
stage1Tlb()->setMMU(this, _id);
stage2Tlb()->setMMU(this, _id);
diff --git a/src/arch/arm/table_walker.hh b/src/arch/arm/table_walker.hh
index 1d2b3f1..c18268a 100644
--- a/src/arch/arm/table_walker.hh
+++ b/src/arch/arm/table_walker.hh
@@ -829,7 +829,7 @@
/** Port shared by the two table walkers. */
DmaPort* port;
- /** Master id assigned by the MMU. */
+ /** Unique id assigned by the MMU. */
MasterID _id;
/** Indicates whether this table walker is part of the stage 2 mmu */
diff --git a/src/arch/arm/tlb.hh b/src/arch/arm/tlb.hh
index ae87676..55be97e 100644
--- a/src/arch/arm/tlb.hh
+++ b/src/arch/arm/tlb.hh
@@ -399,7 +399,7 @@
* reference. For ARM this method will always return a valid port
* pointer.
*
- * @return A pointer to the walker master port
+ * @return A pointer to the walker request port
*/
Port *getTableWalkerPort() override;
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I97f96b4bb69de317cc3e652689dd47f6fcda85a1
Gerrit-Change-Number: 33542
Gerrit-PatchSet: 1
Gerrit-Owner: Shivani Parekh <[email protected]>
Gerrit-MessageType: newchange
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