Shivani Parekh has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/33543 )

Change subject: dev: Update master/slave comments + variables -x86
......................................................................

dev: Update master/slave comments + variables -x86

Change-Id: I1f924b3787fa7a0d5f5980f94163b8aa7afee862
---
M src/dev/x86/Pc.py
M src/dev/x86/SouthBridge.py
M src/dev/x86/i82094aa.cc
M src/dev/x86/i82094aa.hh
M src/dev/x86/i8259.cc
M src/dev/x86/i8259.hh
6 files changed, 40 insertions(+), 38 deletions(-)



diff --git a/src/dev/x86/Pc.py b/src/dev/x86/Pc.py
index 4a732e6..089df50 100644
--- a/src/dev/x86/Pc.py
+++ b/src/dev/x86/Pc.py
@@ -75,12 +75,12 @@

     def attachIO(self, bus, dma_ports = []):
         self.south_bridge.attachIO(bus, dma_ports)
-        self.i_dont_exist1.pio = bus.master
-        self.i_dont_exist2.pio = bus.master
-        self.behind_pci.pio = bus.master
-        self.com_1.pio = bus.master
-        self.fake_com_2.pio = bus.master
-        self.fake_com_3.pio = bus.master
-        self.fake_com_4.pio = bus.master
-        self.fake_floppy.pio = bus.master
+        self.i_dont_exist1.pio = bus.mem_side
+        self.i_dont_exist2.pio = bus.mem_side
+        self.behind_pci.pio = bus.mem_side
+        self.com_1.pio = bus.mem_side
+        self.fake_com_2.pio = bus.mem_side
+        self.fake_com_3.pio = bus.mem_side
+        self.fake_com_4.pio = bus.mem_side
+        self.fake_floppy.pio = bus.mem_side
         self.pci_host.pio = bus.default
diff --git a/src/dev/x86/SouthBridge.py b/src/dev/x86/SouthBridge.py
index 7fd16cc..9a10df8 100644
--- a/src/dev/x86/SouthBridge.py
+++ b/src/dev/x86/SouthBridge.py
@@ -97,15 +97,15 @@
         self.speaker.i8254 = self.pit
         self.io_apic.external_int_pic = self.pic1
         # Connect to the bus
-        self.cmos.pio = bus.master
-        self.dma1.pio = bus.master
-        self.ide.pio = bus.master
+        self.cmos.pio = bus.mem_side
+        self.dma1.pio = bus.mem_side
+        self.ide.pio = bus.mem_side
         if dma_ports.count(self.ide.dma) == 0:
-                self.ide.dma = bus.slave
-        self.keyboard.pio = bus.master
-        self.pic1.pio = bus.master
-        self.pic2.pio = bus.master
-        self.pit.pio = bus.master
-        self.speaker.pio = bus.master
-        self.io_apic.pio = bus.master
-        self.io_apic.int_requestor = bus.slave
+                self.ide.dma = bus.cpu_side
+        self.keyboard.pio = bus.mem_side
+        self.pic1.pio = bus.mem_side
+        self.pic2.pio = bus.mem_side
+        self.pit.pio = bus.mem_side
+        self.speaker.pio = bus.mem_side
+        self.io_apic.pio = bus.mem_side
+        self.io_apic.int_requestor = bus.cpu_side
diff --git a/src/dev/x86/i82094aa.cc b/src/dev/x86/i82094aa.cc
index 50b6e47..c7817dc 100644
--- a/src/dev/x86/i82094aa.cc
+++ b/src/dev/x86/i82094aa.cc
@@ -42,7 +42,7 @@
 X86ISA::I82094AA::I82094AA(Params *p)
     : BasicPioDevice(p, 20), extIntPic(p->external_int_pic),
       lowestPriorityOffset(0),
-      intMasterPort(name() + ".int_requestor", this, this, p->int_latency)
+      intRequestPort(name() + ".int_request", this, this, p->int_latency)
 {
// This assumes there's only one I/O APIC in the system and since the apic // id is stored in a 8-bit field with 0xff meaning broadcast, the id must
@@ -71,16 +71,16 @@
     // the piodevice init() function.
     BasicPioDevice::init();

- // If the master port isn't connected, we can't send interrupts anywhere.
-    panic_if(!intMasterPort.isConnected(),
+ // If the request port isn't connected, we can't send interrupts anywhere.
+    panic_if(!intRequestPort.isConnected(),
             "Int port not connected to anything!");
 }

 Port &
 X86ISA::I82094AA::getPort(const std::string &if_name, PortID idx)
 {
-    if (if_name == "int_requestor")
-        return intMasterPort;
+    if (if_name == "int_request")
+        return intRequestPort;
     if (if_name == "inputs")
         return *inputs.at(idx);
     else
@@ -242,7 +242,7 @@
         }
         for (auto id: apics) {
             PacketPtr pkt = buildIntTriggerPacket(id, message);
-            intMasterPort.sendMessage(pkt, sys->isTimingMode());
+            intRequestPort.sendMessage(pkt, sys->isTimingMode());
         }
     }
 }
diff --git a/src/dev/x86/i82094aa.hh b/src/dev/x86/i82094aa.hh
index 2c81e27..dd23011 100644
--- a/src/dev/x86/i82094aa.hh
+++ b/src/dev/x86/i82094aa.hh
@@ -82,7 +82,7 @@

     std::vector<IntSinkPin<I82094AA> *> inputs;

-    IntMasterPort<I82094AA> intMasterPort;
+    IntMasterPort<I82094AA> intRequestPort;

   public:
     typedef I82094AAParams Params;
diff --git a/src/dev/x86/i8259.cc b/src/dev/x86/i8259.cc
index 1e081d7..5b763f8 100644
--- a/src/dev/x86/i8259.cc
+++ b/src/dev/x86/i8259.cc
@@ -38,7 +38,7 @@
 X86ISA::I8259::I8259(Params * p)
     : BasicPioDevice(p, 2),
       latency(p->pio_latency),
-      mode(p->mode), slave(p->slave),
+      mode(p->mode), responder(p->slave),
       IRR(0), ISR(0), IMR(0),
       readIRR(true), initControlWord(0), autoEOI(false)
 {
@@ -191,7 +191,8 @@
           case 0x2:
             DPRINTF(I8259, "Received initialization command word 3.\n");
             if (mode == Enums::I8259Master) {
- DPRINTF(I8259, "Slaves attached to IRQs:%s%s%s%s%s%s%s%s\n",
+                DPRINTF(I8259, "Responders attached to "
+                        "IRQs:%s%s%s%s%s%s%s%s\n",
                         bits(val, 0) ? " 0" : "",
                         bits(val, 1) ? " 1" : "",
                         bits(val, 2) ? " 2" : "",
@@ -202,7 +203,7 @@
                         bits(val, 7) ? " 7" : "");
                 cascadeBits = val;
             } else {
-                DPRINTF(I8259, "Slave ID is %d.\n", val & mask(3));
+                DPRINTF(I8259, "Responder ID is %d.\n", val & mask(3));
                 cascadeBits = val & mask(3);
             }
             if (expectICW4)
@@ -307,10 +308,10 @@
 X86ISA::I8259::getVector()
 {
     /*
-     * This code only handles one slave. Since that's how the PC platform
+ * This code only handles one responder. Since that's how the PC platform
      * always uses the 8259 PIC, there shouldn't be any need for more. If
-     * there -is- a need for more for some reason, "slave" can become a
-     * vector of slaves.
+     * there -is- a need for more for some reason, "responder" can become a
+     * vector of responders.
      */
     int line = findMsbSet(IRR);
     IRR &= ~(1 << line);
@@ -320,10 +321,10 @@
     } else {
         ISR |= 1 << line;
     }
-    if (slave && bits(cascadeBits, line)) {
-        DPRINTF(I8259, "Interrupt was from slave who will "
+    if (responder && bits(cascadeBits, line)) {
+        DPRINTF(I8259, "Interrupt was from responder who will "
                 "provide the vector.\n");
-        return slave->getVector();
+        return responder->getVector();
     }
     return line | vectorOffset;
 }
diff --git a/src/dev/x86/i8259.hh b/src/dev/x86/i8259.hh
index 85f9ef8..dbb43f0 100644
--- a/src/dev/x86/i8259.hh
+++ b/src/dev/x86/i8259.hh
@@ -49,7 +49,7 @@
     std::vector<IntSourcePin<I8259> *> output;
     std::vector<IntSinkPin<I8259> *> inputs;
     Enums::X86I8259CascadeMode mode;
-    I8259 * slave;
+    I8259 * responder;

     // Interrupt Request Register
     uint8_t IRR;
@@ -62,8 +62,9 @@
     uint8_t vectorOffset;

     bool cascadeMode;
- // A bit vector of lines with slaves attached, or the slave id, depending
-    // on if this is a master or slave PIC.
+    // A bit vector of lines with responders attached, or the
+    // responder id, depending
+    // on if this is a requestor or responder PIC.
     uint8_t cascadeBits;

     bool edgeTriggered;

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/33543
To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings

Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I1f924b3787fa7a0d5f5980f94163b8aa7afee862
Gerrit-Change-Number: 33543
Gerrit-PatchSet: 1
Gerrit-Owner: Shivani Parekh <[email protected]>
Gerrit-MessageType: newchange
_______________________________________________
gem5-dev mailing list -- [email protected]
To unsubscribe send an email to [email protected]
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

Reply via email to