Kyle Roarty has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/32614 )
Change subject: arch-gcn3: Update LmReqsInPipe in atomic flats when
execMask=0
......................................................................
arch-gcn3: Update LmReqsInPipe in atomic flats when execMask=0
In flat instructions, wrLmReqsInPipe/rdLmReqsInPipe are decremented
in the calcAddr() function. However, the calcAddr() function is only
called when execMask != 0.
This patch adds in statements to decrement wrLmReqsInPipe and
rdLmReqsInPipe in all implemented atomic flats when execMask is 0.
This fixes a scenario where vector local memory and flat instructions
are unable to execute due to LocalMemPipeline::isLMReqFIFOWrRdy
always returning false in ScheduleStage::dispatchReady after too many
atomic flats execute with execMask = 0
Change-Id: I081cfd3faf74bbfcf0728445e7160fa2a76a6a7e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32614
Reviewed-by: Matt Sinclair <mattdsincl...@gmail.com>
Reviewed-by: Alexandru Duțu <alexandru.d...@amd.com>
Maintainer: Anthony Gutierrez <anthony.gutier...@amd.com>
Tested-by: kokoro <noreply+kok...@google.com>
---
M src/arch/gcn3/insts/instructions.cc
1 file changed, 22 insertions(+), 0 deletions(-)
Approvals:
Alexandru Duțu: Looks good to me, approved
Matt Sinclair: Looks good to me, but someone else must approve
Anthony Gutierrez: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/gcn3/insts/instructions.cc
b/src/arch/gcn3/insts/instructions.cc
index fd89ae2..296dbad 100644
--- a/src/arch/gcn3/insts/instructions.cc
+++ b/src/arch/gcn3/insts/instructions.cc
@@ -40374,6 +40374,8 @@
wf->decLGKMInstsIssued();
wf->wrGmReqsInPipe--;
wf->rdGmReqsInPipe--;
+ wf->wrLmReqsInPipe--;
+ wf->rdLmReqsInPipe--;
if (instData.GLC) {
gpuDynInst->exec_mask = wf->execMask();
wf->computeUnit->vrf[wf->simdId]->
@@ -40481,6 +40483,8 @@
wf->decLGKMInstsIssued();
wf->wrGmReqsInPipe--;
wf->rdGmReqsInPipe--;
+ wf->wrLmReqsInPipe--;
+ wf->rdLmReqsInPipe--;
if (instData.GLC) {
gpuDynInst->exec_mask = wf->execMask();
wf->computeUnit->vrf[wf->simdId]->
@@ -40589,6 +40593,8 @@
wf->decLGKMInstsIssued();
wf->wrGmReqsInPipe--;
wf->rdGmReqsInPipe--;
+ wf->wrLmReqsInPipe--;
+ wf->rdLmReqsInPipe--;
if (instData.GLC) {
gpuDynInst->exec_mask = wf->execMask();
wf->computeUnit->vrf[wf->simdId]->
@@ -40684,6 +40690,8 @@
wf->decLGKMInstsIssued();
wf->wrGmReqsInPipe--;
wf->rdGmReqsInPipe--;
+ wf->wrLmReqsInPipe--;
+ wf->rdLmReqsInPipe--;
if (instData.GLC) {
gpuDynInst->exec_mask = wf->execMask();
wf->computeUnit->vrf[wf->simdId]->
@@ -40953,6 +40961,8 @@
wf->decLGKMInstsIssued();
wf->wrGmReqsInPipe--;
wf->rdGmReqsInPipe--;
+ wf->wrLmReqsInPipe--;
+ wf->rdLmReqsInPipe--;
if (instData.GLC) {
gpuDynInst->exec_mask = wf->execMask();
wf->computeUnit->vrf[wf->simdId]->
@@ -41048,6 +41058,8 @@
wf->decLGKMInstsIssued();
wf->wrGmReqsInPipe--;
wf->rdGmReqsInPipe--;
+ wf->wrLmReqsInPipe--;
+ wf->rdLmReqsInPipe--;
if (instData.GLC) {
gpuDynInst->exec_mask = wf->execMask();
wf->computeUnit->vrf[wf->simdId]->
@@ -41172,6 +41184,8 @@
wf->decLGKMInstsIssued();
wf->wrGmReqsInPipe--;
wf->rdGmReqsInPipe--;
+ wf->wrLmReqsInPipe--;
+ wf->rdLmReqsInPipe--;
if (instData.GLC) {
gpuDynInst->exec_mask = wf->execMask();
wf->computeUnit->vrf[wf->simdId]->
@@ -41281,6 +41295,8 @@
wf->decLGKMInstsIssued();
wf->wrGmReqsInPipe--;
wf->rdGmReqsInPipe--;
+ wf->wrLmReqsInPipe--;
+ wf->rdLmReqsInPipe--;
if (instData.GLC) {
gpuDynInst->exec_mask = wf->execMask();
wf->computeUnit->vrf[wf->simdId]->
@@ -41378,6 +41394,8 @@
wf->decLGKMInstsIssued();
wf->wrGmReqsInPipe--;
wf->rdGmReqsInPipe--;
+ wf->wrLmReqsInPipe--;
+ wf->rdLmReqsInPipe--;
if (instData.GLC) {
gpuDynInst->exec_mask = wf->execMask();
wf->computeUnit->vrf[wf->simdId]->
@@ -41657,6 +41675,8 @@
wf->decLGKMInstsIssued();
wf->wrGmReqsInPipe--;
wf->rdGmReqsInPipe--;
+ wf->wrLmReqsInPipe--;
+ wf->rdLmReqsInPipe--;
if (instData.GLC) {
gpuDynInst->exec_mask = wf->execMask();
wf->computeUnit->vrf[wf->simdId]->
@@ -41755,6 +41775,8 @@
wf->decLGKMInstsIssued();
wf->wrGmReqsInPipe--;
wf->rdGmReqsInPipe--;
+ wf->wrLmReqsInPipe--;
+ wf->rdLmReqsInPipe--;
if (instData.GLC) {
gpuDynInst->exec_mask = wf->execMask();
wf->computeUnit->vrf[wf->simdId]->
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I081cfd3faf74bbfcf0728445e7160fa2a76a6a7e
Gerrit-Change-Number: 32614
Gerrit-PatchSet: 3
Gerrit-Owner: Kyle Roarty <kyleroarty1...@gmail.com>
Gerrit-Reviewer: Alexandru Duțu <alexandru.d...@amd.com>
Gerrit-Reviewer: Anthony Gutierrez <anthony.gutier...@amd.com>
Gerrit-Reviewer: Bradford Beckmann <bradford.beckm...@gmail.com>
Gerrit-Reviewer: Kyle Roarty <kyleroarty1...@gmail.com>
Gerrit-Reviewer: Matt Sinclair <mattdsincl...@gmail.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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