Shivani Parekh has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/33638 )
Change subject: arch,cpu,gpu-compute: masterId() and MasterId() functions
......................................................................
arch,cpu,gpu-compute: masterId() and MasterId() functions
Change-Id: Ie03a2f73bc0181684a929e5f0c3d89a906c61c73
---
M src/cpu/base.cc
M src/cpu/base.hh
M src/cpu/kvm/base.cc
M src/cpu/kvm/x86_cpu.cc
M src/cpu/minor/fetch1.cc
M src/cpu/minor/lsq.cc
M src/cpu/o3/fetch_impl.hh
M src/cpu/simple/atomic.cc
M src/cpu/simple/base.cc
M src/cpu/simple/timing.cc
10 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/src/cpu/base.cc b/src/cpu/base.cc
index 0ae6ae5..106ba0e 100644
--- a/src/cpu/base.cc
+++ b/src/cpu/base.cc
@@ -250,7 +250,7 @@
if (secondAddr > addr)
size = secondAddr - addr;
- req->setVirt(addr, size, 0x0, dataMasterId(), tc->instAddr());
+ req->setVirt(addr, size, 0x0, dataUniqueId(), tc->instAddr());
// translate to physical address
Fault fault = dtb->translateAtomic(req, tc, BaseTLB::Read);
diff --git a/src/cpu/base.hh b/src/cpu/base.hh
index 5c0c709..74c3e82 100644
--- a/src/cpu/base.hh
+++ b/src/cpu/base.hh
@@ -182,9 +182,9 @@
uint32_t socketId() const { return _socketId; }
/** Reads this CPU's unique data requestor ID */
- MasterID dataMasterId() const { return _dataMasterId; }
+ MasterID dataUniqueId() const { return _dataMasterId; }
/** Reads this CPU's unique instruction requestor ID */
- MasterID instMasterId() const { return _instMasterId; }
+ MasterID instUniqueId() const { return _instMasterId; }
/**
* Get a port on this CPU. All CPUs have a data and
diff --git a/src/cpu/kvm/base.cc b/src/cpu/kvm/base.cc
index 0afab1e..9e4ef18 100644
--- a/src/cpu/kvm/base.cc
+++ b/src/cpu/kvm/base.cc
@@ -1113,7 +1113,7 @@
syncThreadContext();
RequestPtr mmio_req = std::make_shared<Request>(
- paddr, size, Request::UNCACHEABLE, dataMasterId());
+ paddr, size, Request::UNCACHEABLE, dataUniqueId());
mmio_req->setContext(tc->contextId());
// Some architectures do need to massage physical addresses a bit
diff --git a/src/cpu/kvm/x86_cpu.cc b/src/cpu/kvm/x86_cpu.cc
index 6c44af0..5c27049 100644
--- a/src/cpu/kvm/x86_cpu.cc
+++ b/src/cpu/kvm/x86_cpu.cc
@@ -1351,7 +1351,7 @@
for (int i = 0; i < count; ++i) {
RequestPtr io_req = std::make_shared<Request>(
pAddr, kvm_run.io.size,
- Request::UNCACHEABLE, dataMasterId());
+ Request::UNCACHEABLE, dataUniqueId());
io_req->setContext(tc->contextId());
diff --git a/src/cpu/minor/fetch1.cc b/src/cpu/minor/fetch1.cc
index e49140e..717cc7d 100644
--- a/src/cpu/minor/fetch1.cc
+++ b/src/cpu/minor/fetch1.cc
@@ -168,7 +168,7 @@
request->request->setContext(cpu.threads[tid]->getTC()->contextId());
request->request->setVirt(
- aligned_pc, request_size, Request::INST_FETCH, cpu.instMasterId(),
+ aligned_pc, request_size, Request::INST_FETCH, cpu.instUniqueId(),
/* I've no idea why we need the PC, but give it */
thread.pc.instAddr());
diff --git a/src/cpu/minor/lsq.cc b/src/cpu/minor/lsq.cc
index f55d3a1..6993341 100644
--- a/src/cpu/minor/lsq.cc
+++ b/src/cpu/minor/lsq.cc
@@ -1645,7 +1645,7 @@
int cid = cpu.threads[inst->id.threadId]->getTC()->contextId();
request->request->setContext(cid);
request->request->setVirt(
- addr, size, flags, cpu.dataMasterId(),
+ addr, size, flags, cpu.dataUniqueId(),
/* I've no idea why we need the PC, but give it */
inst->pc.instAddr(), std::move(amo_op));
request->request->setByteEnable(byte_enable);
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 7ecab54..05fb86f 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -631,7 +631,7 @@
// Build request here.
RequestPtr mem_req = std::make_shared<Request>(
fetchBufferBlockPC, fetchBufferSize,
- Request::INST_FETCH, cpu->instMasterId(), pc,
+ Request::INST_FETCH, cpu->instUniqueId(), pc,
cpu->thread[tid]->contextId());
mem_req->taskId(cpu->taskId());
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index 34be352..d881bec 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -350,14 +350,14 @@
auto it_start = byte_enable.begin() + (size - (frag_size +
size_left));
auto it_end = byte_enable.begin() + (size - size_left);
if (isAnyActiveElement(it_start, it_end)) {
- req->setVirt(frag_addr, frag_size, flags, dataMasterId(),
+ req->setVirt(frag_addr, frag_size, flags, dataUniqueId(),
inst_addr);
req->setByteEnable(std::vector<bool>(it_start, it_end));
} else {
predicate = false;
}
} else {
- req->setVirt(frag_addr, frag_size, flags, dataMasterId(),
+ req->setVirt(frag_addr, frag_size, flags, dataUniqueId(),
inst_addr);
req->setByteEnable(std::vector<bool>());
}
@@ -592,7 +592,7 @@
dcache_latency = 0;
req->taskId(taskId());
- req->setVirt(addr, size, flags, dataMasterId(),
+ req->setVirt(addr, size, flags, dataUniqueId(),
thread->pcState().instAddr(), std::move(amo_op));
// translate to physical address
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index a597f06..f7ff574 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -475,7 +475,7 @@
DPRINTF(Fetch, "Fetch: Inst PC:%08p, Fetch PC:%08p\n", instAddr,
fetchPC);
req->setVirt(fetchPC, sizeof(MachInst), Request::INST_FETCH,
- instMasterId(), instAddr);
+ instUniqueId(), instAddr);
}
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 84d7d0e..da4d7ce 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -427,7 +427,7 @@
traceData->setMem(addr, size, flags);
RequestPtr req = std::make_shared<Request>(
- addr, size, flags, dataMasterId(), pc, thread->contextId());
+ addr, size, flags, dataUniqueId(), pc, thread->contextId());
if (!byte_enable.empty()) {
req->setByteEnable(byte_enable);
}
@@ -511,7 +511,7 @@
traceData->setMem(addr, size, flags);
RequestPtr req = std::make_shared<Request>(
- addr, size, flags, dataMasterId(), pc, thread->contextId());
+ addr, size, flags, dataUniqueId(), pc, thread->contextId());
if (!byte_enable.empty()) {
req->setByteEnable(byte_enable);
}
@@ -569,7 +569,7 @@
traceData->setMem(addr, size, flags);
RequestPtr req = make_shared<Request>(addr, size, flags,
- dataMasterId(), pc, thread->contextId(),
+ dataUniqueId(), pc, thread->contextId(),
std::move(amo_op));
assert(req->hasAtomicOpFunctor());
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/33638
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ie03a2f73bc0181684a929e5f0c3d89a906c61c73
Gerrit-Change-Number: 33638
Gerrit-PatchSet: 1
Gerrit-Owner: Shivani Parekh <[email protected]>
Gerrit-MessageType: newchange
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