Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/33434 )
Change subject: arch-arm: Fix coding style in addressTranslation methods
......................................................................
arch-arm: Fix coding style in addressTranslation methods
armFault -> arm_fault
Change-Id: I6263b105f8757b34dd15a06b16abe7289073614d
Signed-off-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33434
Reviewed-by: Nikos Nikoleris <nikos.nikole...@arm.com>
Tested-by: kokoro <noreply+kok...@google.com>
---
M src/arch/arm/isa.cc
1 file changed, 10 insertions(+), 10 deletions(-)
Approvals:
Nikos Nikoleris: Looks good to me, approved
Giacomo Travaglini: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index 6ef9fe3..0c312d0 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -2359,15 +2359,15 @@
"MISCREG: Translated addr %#x: PAR_EL1: %#xx\n",
val, par);
} else {
- ArmFault *armFault = static_cast<ArmFault *>(fault.get());
- armFault->update(tc);
+ ArmFault *arm_fault = static_cast<ArmFault *>(fault.get());
+ arm_fault->update(tc);
// Set fault bit and FSR
- FSR fsr = armFault->getFsr(tc);
+ FSR fsr = arm_fault->getFsr(tc);
par.f = 1; // F bit
par.fst = fsr.status; // FST
- par.ptw = (armFault->iss() >> 7) & 0x1; // S1PTW
- par.s = armFault->isStage2() ? 1 : 0; // S
+ par.ptw = (arm_fault->iss() >> 7) & 0x1; // S1PTW
+ par.s = arm_fault->isStage2() ? 1 : 0; // S
DPRINTF(MiscRegs,
"MISCREG: Translated addr %#x fault fsr %#x: PAR: %#x\n",
@@ -2418,15 +2418,15 @@
"MISCREG: Translated addr 0x%08x: PAR: 0x%08x\n",
val, par);
} else {
- ArmFault *armFault = static_cast<ArmFault *>(fault.get());
- armFault->update(tc);
+ ArmFault *arm_fault = static_cast<ArmFault *>(fault.get());
+ arm_fault->update(tc);
// Set fault bit and FSR
- FSR fsr = armFault->getFsr(tc);
+ FSR fsr = arm_fault->getFsr(tc);
par.f = 0x1; // F bit
par.lpae = fsr.lpae;
- par.ptw = (armFault->iss() >> 7) & 0x1;
- par.s = armFault->isStage2() ? 1 : 0;
+ par.ptw = (arm_fault->iss() >> 7) & 0x1;
+ par.s = arm_fault->isStage2() ? 1 : 0;
if (par.lpae) {
// LPAE - rearange fault status
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I6263b105f8757b34dd15a06b16abe7289073614d
Gerrit-Change-Number: 33434
Gerrit-PatchSet: 3
Gerrit-Owner: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Nikos Nikoleris <nikos.nikole...@arm.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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