[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Fix build errors with gcc 10.2

[Bobby R. Bruce (Gerrit) via gem5-dev]

Bobby R. Bruce has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/33154 )

Change subject: arch-arm: Fix build errors with gcc 10.2
......................................................................
arch-arm: Fix build errors with gcc 10.2

The "-Werror=type-limits" flag in GCC 10.2 reports these errors,
because ``imm`` in neon.isa, and ``imm`` and ``count`` in sve.isa are
unsigned, and they're used to do ``imm < 0`` and ``imm * count >= 0``
comparison.

Change-Id: I33934357f578a9fc1040a6d9c08ea929fb36eb47
Signed-off-by: Iru Cai <mytbk920...@gmail.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33154
Reviewed-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
Reviewed-by: Richard Cooper <richard.coo...@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Tested-by: kokoro <noreply+kok...@google.com>
---
M src/arch/arm/isa/insts/neon.isa
M src/arch/arm/isa/insts/sve.isa
2 files changed, 6 insertions(+), 11 deletions(-)

Approvals:
  Giacomo Travaglini: Looks good to me, approved; Looks good to me, approved
  Richard Cooper: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/arm/isa/insts/neon.isa  
b/src/arch/arm/isa/insts/neon.isa
index aa67353..d536d5b 100644
--- a/src/arch/arm/isa/insts/neon.isa
+++ b/src/arch/arm/isa/insts/neon.isa
@@ -1416,7 +1416,7 @@
         if readDest:
             readDestCode = 'destElem = letoh(destReg.elements[i]);'
         eWalkCode += '''
-        if (imm < 0 && imm >= eCount) {
+        if (imm >= eCount) {
             fault = std::make_shared<UndefinedInstruction>(machInst, false,
                                                            mnemonic);
         } else {
@@ -1468,7 +1468,7 @@
         if readDest:
             readDestCode = 'destElem = letoh(destReg.elements[i]);'
         eWalkCode += '''
-        if (imm < 0 && imm >= eCount) {
+        if (imm >= eCount) {
             fault = std::make_shared<UndefinedInstruction>(machInst, false,
                                                           mnemonic);
         } else {
@@ -1518,7 +1518,7 @@
         if readDest:
             readDestCode = 'destReg = destRegs[i];'
         eWalkCode += '''
-        if (imm < 0 && imm >= eCount) {
+        if (imm >= eCount) {
             fault = std::make_shared<UndefinedInstruction>(machInst, false,
                                                            mnemonic);
         } else {
diff --git a/src/arch/arm/isa/insts/sve.isa b/src/arch/arm/isa/insts/sve.isa
index 9314ba9..4e49e92 100644
--- a/src/arch/arm/isa/insts/sve.isa
+++ b/src/arch/arm/isa/insts/sve.isa
@@ -4335,13 +4335,10 @@
         destElem = srcElem1 - (count * imm);
         bool negDest = (destElem < 0);
         bool negSrc = (srcElem1 < 0);
-        bool posCount = ((count * imm) >= 0);
-        if ((negDest != negSrc) && (negSrc == posCount)) {
+        if (!negDest && negSrc) {
             destElem = static_cast<%(dstType)s>(
                 (%(dstType)s)1 << (sizeof(%(dstType)s) * 8 - 1)
                 );
-            if (negDest)
-                destElem -= 1;
         }
     '''
     sveElemCountInst('sqdec', 'Sqdec32', 'SimdAluOp', signedTypes,
@@ -4394,13 +4391,11 @@
         destElem = srcElem1 + (count * imm);
         bool negDest = (destElem < 0);
         bool negSrc = (srcElem1 < 0);
-        bool negCount = ((count * imm) < 0);
-        if ((negDest != negSrc) && (negSrc == negCount)) {
+        if (negDest && !negSrc) {
             destElem = static_cast<%(dstType)s>(
                 (%(dstType)s)1 << (sizeof(%(dstType)s) * 8 - 1)
                 );
-            if (negDest)
-                destElem -= 1;
+            destElem -= 1;
         }
     '''
     sveElemCountInst('sqinc', 'Sqinc32', 'SimdAluOp', signedTypes,

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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I33934357f578a9fc1040a6d9c08ea929fb36eb47
Gerrit-Change-Number: 33154
Gerrit-PatchSet: 4
Gerrit-Owner: Iru Cai <mytbk920...@gmail.com>
Gerrit-Assignee: Richard Cooper <richard.coo...@arm.com>
Gerrit-Reviewer: Bobby R. Bruce <bbr...@ucdavis.edu>
Gerrit-Reviewer: Giacomo Gabrielli <giacomo.gabrie...@arm.com>
Gerrit-Reviewer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Jason Lowe-Power <power...@gmail.com>
Gerrit-Reviewer: Richard Cooper <richard.coo...@arm.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-CC: Gabe Black <gabebl...@google.com>
Gerrit-MessageType: merged
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