Giacomo Travaglini has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/34375 )
Change subject: dev-arm: Adding a SRAM in VExpress_GEM5_V1
......................................................................
dev-arm: Adding a SRAM in VExpress_GEM5_V1
This is added in order to match the RS1 memory map
JIRA: https://gem5.atlassian.net/browse/GEM5-768
Change-Id: I51e7aeafe1468a68fe7a3d78c7a6c405114df88f
Signed-off-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
---
M src/dev/arm/RealView.py
1 file changed, 25 insertions(+), 0 deletions(-)
diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py
index 9ab0472..cc03900 100644
--- a/src/dev/arm/RealView.py
+++ b/src/dev/arm/RealView.py
@@ -542,6 +542,24 @@
yield node
+class MmioSRAM(SimpleMemory):
+ def generateDeviceTree(self, state):
+ node = FdtNode("sram@%x" % long(self.range.start))
+ node.appendCompatible(["mmio-sram"])
+ node.append(FdtPropertyWords("reg",
+ state.addrCells(self.range.start) +
+ state.sizeCells(self.range.size()) ))
+
+ local_state = FdtState(addr_cells=2, size_cells=2, cpu_cells=1)
+ node.append(local_state.addrCellsProperty())
+ node.append(local_state.sizeCellsProperty())
+ node.append(FdtPropertyWords("ranges",
+ local_state.addrCells(0) +
+ state.addrCells(self.range.start) +
+ state.sizeCells(self.range.size()) ))
+
+ yield node
+
class FVPBasePwrCtrl(BasicPioDevice):
"""
Based on Fast Models Base_PowerController v11.8
@@ -897,6 +915,8 @@
0x2d000000-0x2d00ffff: GPU (reserved)
+ 0x2e000000-0x2e007fff: Non-trusted SRAM
+
0x2f000000-0x2fffffff: PCI IO space
0x30000000-0x3fffffff: PCI config space
@@ -963,6 +983,10 @@
trusted_sram = SimpleMemory(range=AddrRange(0x04000000, size='256kB'),
conf_table_reported=False)
+ # Non-Trusted SRAM
+ non_trusted_sram = MmioSRAM(range=AddrRange(0x2e000000, size=0x8000),
+ conf_table_reported=False)
+
# Platform control device (off-chip)
realview_io = RealViewCtrl(proc_id0=0x14000000, proc_id1=0x14000000,
idreg=0x30101100, pio_addr=0x1c010000)
@@ -1002,6 +1026,7 @@
memories = [
self.bootmem,
self.trusted_sram,
+ self.non_trusted_sram,
self.flash0,
]
return memories
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I51e7aeafe1468a68fe7a3d78c7a6c405114df88f
Gerrit-Change-Number: 34375
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-MessageType: newchange
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