Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/35016 )

Change subject: arch-arm: Instantiate a single HTM checkpoint at ISA::startup
......................................................................

arch-arm: Instantiate a single HTM checkpoint at ISA::startup

Change-Id: I48cc71dce607233f025387379507bcd485943dde
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35016
Reviewed-by: Jason Lowe-Power <power...@gmail.com>
Maintainer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Tested-by: kokoro <noreply+kok...@google.com>
---
M src/arch/arm/insts/tme64ruby.cc
M src/arch/arm/isa.cc
2 files changed, 15 insertions(+), 7 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved
  Giacomo Travaglini: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/arm/insts/tme64ruby.cc b/src/arch/arm/insts/tme64ruby.cc
index 99481ba..f8d9481 100644
--- a/src/arch/arm/insts/tme64ruby.cc
+++ b/src/arch/arm/insts/tme64ruby.cc
@@ -109,15 +109,16 @@

         // checkpointing occurs in the outer transaction only
         if (htm_depth == 1) {
-            auto new_cpt = new HTMCheckpoint();
+ BaseHTMCheckpointPtr& cpt = xc->tcBase()->getHtmCheckpointPtr();

-            new_cpt->save(tc);
-            new_cpt->destinationRegister(dest);
+            HTMCheckpoint *armcpt =
+                dynamic_cast<HTMCheckpoint*>(cpt.get());
+            assert(armcpt != nullptr);
+
+            armcpt->save(tc);
+            armcpt->destinationRegister(dest);

             ArmISA::globalClearExclusive(tc);
-
-            xc->tcBase()->setHtmCheckpointPtr(
-                std::unique_ptr<BaseHTMCheckpoint>(new_cpt));
         }

         xc->setIntRegOperand(this, 0, (Dest64) & mask(intWidth));
diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index 9ace236..4ad1125 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -38,6 +38,7 @@
 #include "arch/arm/isa.hh"

 #include "arch/arm/faults.hh"
+#include "arch/arm/htm.hh"
 #include "arch/arm/interrupts.hh"
 #include "arch/arm/pmu.hh"
 #include "arch/arm/self_debug.hh"
@@ -439,9 +440,15 @@
 {
     BaseISA::startup();

-    if (tc)
+    if (tc) {
         setupThreadContext();

+        if (haveTME) {
+            std::unique_ptr<BaseHTMCheckpoint> cpt(new HTMCheckpoint());
+            tc->setHtmCheckpointPtr(std::move(cpt));
+        }
+    }
+
     afterStartup = true;
 }


--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/35016
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Gerrit-Project: public/gem5
Gerrit-Branch: release-staging-v20.1.0.0
Gerrit-Change-Id: I48cc71dce607233f025387379507bcd485943dde
Gerrit-Change-Number: 35016
Gerrit-PatchSet: 2
Gerrit-Owner: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Bobby R. Bruce <bbr...@ucdavis.edu>
Gerrit-Reviewer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Jason Lowe-Power <power...@gmail.com>
Gerrit-Reviewer: Timothy Hayes <timothy.ha...@arm.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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