Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/23529 )

Change subject: arch-x86: Add byteEnable mask in x86 memhelpers
......................................................................

arch-x86: Add byteEnable mask in x86 memhelpers

Next patch will make the byteEnable mandatory in the ExecContext
interface so we need to amend the existing helpers to make them
use generate the boolean vector.

JIRA: https://gem5.atlassian.net/browse/GEM5-196

Change-Id: Ib24550aa1e22049487ef4ec2748b786be456d342
Signed-off-by: Giacomo Travaglini <[email protected]>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23529
Tested-by: kokoro <[email protected]>
Maintainer: Anthony Gutierrez <[email protected]>
Reviewed-by: Anthony Gutierrez <[email protected]>
---
M src/arch/x86/memhelpers.hh
1 file changed, 20 insertions(+), 8 deletions(-)

Approvals:
  Anthony Gutierrez: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/x86/memhelpers.hh b/src/arch/x86/memhelpers.hh
index 9f54954..35dfac6 100644
--- a/src/arch/x86/memhelpers.hh
+++ b/src/arch/x86/memhelpers.hh
@@ -45,7 +45,8 @@
 initiateMemRead(ExecContext *xc, Trace::InstRecord *traceData, Addr addr,
                 unsigned dataSize, Request::Flags flags)
 {
-    return xc->initiateMemRead(addr, dataSize, flags);
+    const std::vector<bool> byte_enable(dataSize, true);
+    return xc->initiateMemRead(addr, dataSize, flags, byte_enable);
 }

 static void
@@ -106,7 +107,9 @@
               uint64_t &mem, unsigned dataSize, Request::Flags flags)
 {
     memset(&mem, 0, sizeof(mem));
-    Fault fault = xc->readMem(addr, (uint8_t *)&mem, dataSize, flags);
+    const std::vector<bool> byte_enable(dataSize, true);
+    Fault fault = xc->readMem(addr, (uint8_t *)&mem, dataSize,
+                              flags, byte_enable);
     if (fault == NoFault) {
         // If LE to LE, this is a nop, if LE to BE, the actual data ends up
// in the right place because the LSBs where at the low addresses on
@@ -124,8 +127,11 @@
                     unsigned flags)
 {
     std::array<T, N> real_mem;
+    // Size is fixed at compilation time. Make a static vector.
+    constexpr auto size = sizeof(T) * N;
+    static const std::vector<bool> byte_enable(size, true);
     Fault fault = xc->readMem(addr, (uint8_t *)&real_mem,
-                              sizeof(T) * N, flags);
+                              size, flags, byte_enable);
     if (fault == NoFault) {
         real_mem = letoh(real_mem);
         for (int i = 0; i < N; i++)
@@ -166,8 +172,11 @@
     for (int i = 0; i < N; i++)
         real_mem[i] = mem[i];
     real_mem = htole(real_mem);
-    return xc->writeMem((uint8_t *)&real_mem, sizeof(T) * N,
-                        addr, flags, res);
+    // Size is fixed at compilation time. Make a static vector.
+    constexpr auto size = sizeof(T) * N;
+    static const std::vector<bool> byte_enable(size, true);
+    return xc->writeMem((uint8_t *)&real_mem, size,
+                        addr, flags, res, byte_enable);
 }

 static Fault
@@ -178,7 +187,9 @@
     if (traceData)
         traceData->setData(mem);
     mem = htole(mem);
-    return xc->writeMem((uint8_t *)&mem, dataSize, addr, flags, res);
+    const std::vector<bool> byte_enable(dataSize, true);
+    return xc->writeMem((uint8_t *)&mem, dataSize, addr, flags,
+                        res, byte_enable);
 }

 template <size_t N>
@@ -208,8 +219,9 @@
     if (traceData)
         traceData->setData(mem);
     uint64_t host_mem = htole(mem);
-    Fault fault =
-          xc->writeMem((uint8_t *)&host_mem, dataSize, addr, flags, res);
+    const std::vector<bool> byte_enable(dataSize, true);
+    Fault fault = xc->writeMem((uint8_t *)&host_mem, dataSize, addr,
+                               flags, res, byte_enable);
     if (fault == NoFault && res)
         *res = letoh(*res);
     return fault;

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ib24550aa1e22049487ef4ec2748b786be456d342
Gerrit-Change-Number: 23529
Gerrit-PatchSet: 9
Gerrit-Owner: Giacomo Travaglini <[email protected]>
Gerrit-Reviewer: Anthony Gutierrez <[email protected]>
Gerrit-Reviewer: Brandon Potter <[email protected]>
Gerrit-Reviewer: Gabe Black <[email protected]>
Gerrit-Reviewer: Gem5 Cloud Project GCB service account <[email protected]>
Gerrit-Reviewer: Giacomo Travaglini <[email protected]>
Gerrit-Reviewer: Jason Lowe-Power <[email protected]>
Gerrit-Reviewer: kokoro <[email protected]>
Gerrit-MessageType: merged
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