Pierre Ayoub has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/35555 )
Change subject: arch-arm: Add recursion for DTB entry generation inside
ArmISA
......................................................................
arch-arm: Add recursion for DTB entry generation inside ArmISA
In order to generate the ArmPMU's DTB entry, we have to enable recursion
from the ArmISA.
This commit follows this mailing list entry:
https://www.mail-archive.com/[email protected]/msg18401.html
Change-Id: I73012755f0f8c8d4d17278793cf16cb1e8b011df
---
M src/arch/arm/ArmISA.py
1 file changed, 5 insertions(+), 0 deletions(-)
diff --git a/src/arch/arm/ArmISA.py b/src/arch/arm/ArmISA.py
index ebad774..e23ef2b 100644
--- a/src/arch/arm/ArmISA.py
+++ b/src/arch/arm/ArmISA.py
@@ -36,6 +36,7 @@
from m5.params import *
from m5.proxy import *
+from m5.SimObject import SimObject
from m5.objects.ArmPMU import ArmPMU
from m5.objects.ArmSystem import SveVectorLength
from m5.objects.BaseISA import BaseISA
@@ -55,6 +56,10 @@
decoderFlavor = Param.DecoderFlavor(
'Generic', "Decoder flavor specification")
+ # Recurse into subnodes to generate DTB entries. This is mainly needed
to
+ # generate the PMU entry.
+ generateDeviceTree = SimObject.recurseDeviceTree
+
# If no MIDR value is provided, 0x0 is treated by gem5 as follows:
# When 'highest_el_is_64' (AArch64 support) is:
# True -> Cortex-A57 TRM r0p0 MIDR is used
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I73012755f0f8c8d4d17278793cf16cb1e8b011df
Gerrit-Change-Number: 35555
Gerrit-PatchSet: 1
Gerrit-Owner: Pierre Ayoub <[email protected]>
Gerrit-MessageType: newchange
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