Daniel Carvalho has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/35796 )
Change subject: cpu-o3: Organize circular queues and iterators in LSQUnit
......................................................................
cpu-o3: Organize circular queues and iterators in LSQUnit
There were many aliases to circular queues and iterators. In
addition, some iterators had misleading names.
Change-Id: Idf419a4750a0e802087a456501ecb74b29ae8024
Signed-off-by: Daniel R. Carvalho <[email protected]>
---
M src/cpu/o3/lsq_unit.hh
M src/cpu/o3/lsq_unit_impl.hh
2 files changed, 35 insertions(+), 39 deletions(-)
diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh
index 3d6e3f0..9cf58db 100644
--- a/src/cpu/o3/lsq_unit.hh
+++ b/src/cpu/o3/lsq_unit.hh
@@ -51,6 +51,7 @@
#include "arch/generic/debugfaults.hh"
#include "arch/generic/vec_reg.hh"
#include "arch/locked_mem.hh"
+#include "base/circular_queue.hh"
#include "config/the_isa.hh"
#include "cpu/inst_seq.hh"
#include "cpu/timebuf.hh"
@@ -60,7 +61,6 @@
#include "mem/port.hh"
struct DerivO3CPUParams;
-#include "base/circular_queue.hh"
/**
* Class that implements the actual LQ and SQ for each specific
@@ -217,8 +217,9 @@
public:
using LoadQueue = CircularQueue<LQEntry>;
using StoreQueue = CircularQueue<SQEntry>;
+ using LQIterator = typename LoadQueue::iterator;
+ using SQIterator = typename StoreQueue::iterator;
- public:
/** Constructs an LSQ unit. init() must be called prior to use. */
LSQUnit(uint32_t lqEntries, uint32_t sqEntries);
@@ -257,11 +258,11 @@
/** Check for ordering violations in the LSQ. For a store squash if we
* ever find a conflicting load. For a load, only squash if we
* an external snoop invalidate has been seen for that load address
- * @param load_idx index to start checking at
+ *
+ * @param load_it Iterator to start checking at
* @param inst the instruction to check
*/
- Fault checkViolations(typename LoadQueue::iterator& loadIt,
- const DynInstPtr& inst);
+ Fault checkViolations(LQIterator& load_it, const DynInstPtr& inst);
/** Check if an incoming invalidate hits in the lsq on a load
* that might have issued out of order wrt another load beacuse
@@ -381,8 +382,8 @@
/** Try to finish a previously blocked write back attempt */
void writebackBlockedStore();
- /** Completes the store at the specified index. */
- void completeStore(typename StoreQueue::iterator store_idx);
+ /** Completes the store at the specified iterator. */
+ void completeStore(SQIterator store_it);
/** Handles completing the send of a store to memory. */
void storePostSend();
@@ -421,11 +422,11 @@
{
using LSQSenderState::alive;
public:
- LQSenderState(typename LoadQueue::iterator idx_)
- : LSQSenderState(idx_->request(), true), idx(idx_) { }
+ LQSenderState(LQIterator iterator)
+ : LSQSenderState(iterator->request(), true), it(iterator) { }
- /** The LQ index of the instruction. */
- typename LoadQueue::iterator idx;
+ /** The LQ iterator of the instruction. */
+ LQIterator it;
//virtual LSQRequest* request() { return idx->request(); }
virtual void
complete()
@@ -440,10 +441,10 @@
{
using LSQSenderState::alive;
public:
- SQSenderState(typename StoreQueue::iterator idx_)
- : LSQSenderState(idx_->request(), false), idx(idx_) { }
- /** The SQ index of the instruction. */
- typename StoreQueue::iterator idx;
+ SQSenderState(SQIterator iterator)
+ : LSQSenderState(iterator->request(), false), it(iterator) { }
+ /** The SQ iterator of the instruction. */
+ SQIterator it;
//virtual LSQRequest* request() { return idx->request(); }
virtual void
complete()
@@ -490,9 +491,10 @@
private:
/** The LSQUnit thread id. */
ThreadID lsqID;
+
public:
/** The store queue. */
- CircularQueue<SQEntry> storeQueue;
+ StoreQueue storeQueue;
/** The load queue. */
LoadQueue loadQueue;
@@ -520,10 +522,10 @@
// sanity checks and debugging
uint64_t lastRetiredHtmUid;
- /** The index of the first instruction that may be ready to be
+ /** The iterator to the first instruction that may be ready to be
* written back, and has not yet been written back.
*/
- typename StoreQueue::iterator storeWBIt;
+ SQIterator storeWBIt;
/** Address Mask for a cache block (e.g. ~(cache_block_size-1)) */
Addr cacheBlockMask;
@@ -624,11 +626,6 @@
/** Returns whether or not the LSQ unit is stalled. */
bool isStalled() { return stalled; }
- public:
- typedef typename CircularQueue<LQEntry>::iterator LQIterator;
- typedef typename CircularQueue<SQEntry>::iterator SQIterator;
- typedef CircularQueue<LQEntry> LQueue;
- typedef CircularQueue<SQEntry> SQueue;
};
template <class Impl>
diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh
index 808a671..356302d 100644
--- a/src/cpu/o3/lsq_unit_impl.hh
+++ b/src/cpu/o3/lsq_unit_impl.hh
@@ -190,12 +190,12 @@
if (inst->isStore() || inst->isAtomic()) {
auto ss = dynamic_cast<SQSenderState*>(state);
ss->writebackDone();
- completeStore(ss->idx);
+ completeStore(ss->it);
}
} else if (inst->isStore()) {
// This is a regular store (i.e., not store conditionals and
// atomics), so it can complete without writing back
- completeStore(dynamic_cast<SQSenderState*>(state)->idx);
+ completeStore(dynamic_cast<SQSenderState*>(state)->it);
}
}
}
@@ -525,8 +525,7 @@
template <class Impl>
Fault
-LSQUnit<Impl>::checkViolations(typename LoadQueue::iterator& loadIt,
- const DynInstPtr& inst)
+LSQUnit<Impl>::checkViolations(LQIterator& load_it, const DynInstPtr& inst)
{
Addr inst_eff_addr1 = inst->effAddr >> depCheckShift;
Addr inst_eff_addr2 = (inst->effAddr + inst->effSize - 1) >>
depCheckShift;
@@ -536,10 +535,10 @@
* all instructions that will execute before the store writes back.
Thus,
* like the implementation that came before it, we're overly
conservative.
*/
- while (loadIt != loadQueue.end()) {
- DynInstPtr ld_inst = loadIt->instruction();
+ while (load_it != loadQueue.end()) {
+ DynInstPtr ld_inst = load_it->instruction();
if (!ld_inst->effAddrValid() || ld_inst->strictlyOrdered()) {
- ++loadIt;
+ ++load_it;
continue;
}
@@ -596,7 +595,7 @@
}
}
- ++loadIt;
+ ++load_it;
}
return NoFault;
}
@@ -689,7 +688,7 @@
// Check the recently completed loads to see if any match this store's
// address. If so, then we have a memory ordering violation.
- typename LoadQueue::iterator loadIt = store_inst->lqIt;
+ LQIterator load_it = store_inst->lqIt;
Fault store_fault = store_inst->initiateAcc();
@@ -721,7 +720,7 @@
++storesToWB;
}
- return checkViolations(loadIt, store_inst);
+ return checkViolations(load_it, store_inst);
}
@@ -1150,10 +1149,10 @@
template <class Impl>
void
-LSQUnit<Impl>::completeStore(typename StoreQueue::iterator store_idx)
+LSQUnit<Impl>::completeStore(SQIterator store_it)
{
- assert(store_idx->valid());
- store_idx->completed() = true;
+ assert(store_it->valid());
+ store_it->completed() = true;
--storesToWB;
// A bit conservative because a store completion may not free up
entries,
// but hopefully avoids two store completions in one cycle from making
@@ -1163,8 +1162,8 @@
/* We 'need' a copy here because we may clear the entry from the
* store queue. */
- DynInstPtr store_inst = store_idx->instruction();
- if (store_idx == storeQueue.begin()) {
+ DynInstPtr store_inst = store_it->instruction();
+ if (store_it == storeQueue.begin()) {
do {
storeQueue.front().clear();
storeQueue.pop_front();
@@ -1177,7 +1176,7 @@
DPRINTF(LSQUnit, "Completing store [sn:%lli], idx:%i, store head "
"idx:%i\n",
- store_inst->seqNum, store_idx.idx() - 1, storeQueue.head() -
1);
+ store_inst->seqNum, store_it.idx() - 1, storeQueue.head() - 1);
#if TRACING_ON
if (DTRACE(O3PipeView)) {
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Idf419a4750a0e802087a456501ecb74b29ae8024
Gerrit-Change-Number: 35796
Gerrit-PatchSet: 1
Gerrit-Owner: Daniel Carvalho <[email protected]>
Gerrit-MessageType: newchange
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