[gem5-dev] Change in gem5/gem5[develop]: mips: Fix the build after the MMU changes.

[Gabe Black (Gerrit) via gem5-dev]

Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/36995 )

Change subject: mips: Fix the build after the MMU changes.
......................................................................

mips: Fix the build after the MMU changes.

Change-Id: I2bd1a6a8607fe1da056182ca840036db35b53c36
---
M src/arch/mips/isa/decoder.isa
M src/arch/mips/isa/includes.isa
2 files changed, 5 insertions(+), 4 deletions(-)



diff --git a/src/arch/mips/isa/decoder.isa b/src/arch/mips/isa/decoder.isa
index 3b2b015..e5613f5 100644
--- a/src/arch/mips/isa/decoder.isa
+++ b/src/arch/mips/isa/decoder.isa
@@ -738,7 +738,7 @@
                     0x01: tlbr({{
                         MipsISA::PTE *PTEntry =
                             dynamic_cast<MipsISA::TLB *>(
-                                xc->tcBase()->getITBPtr())->
+                                xc->tcBase()->getMMUPtr()->itb)->
                                 getEntry(Index & 0x7FFFFFFF);
                         if (PTEntry == NULL) {
                             fatal("Invalid PTE Entry received on "
@@ -819,7 +819,7 @@
                             (1 << newEntry.AddrShiftAmount) - 1;

                         auto ptr = dynamic_cast<MipsISA::TLB *>(
-                            xc->tcBase()->getITBPtr());
+                            xc->tcBase()->getMMUPtr()->itb);
                         Config3Reg config3 = Config3;
                         PageGrainReg pageGrain = PageGrain;
                         int SP = 0;
@@ -885,7 +885,7 @@
                             (1 << newEntry.AddrShiftAmount) - 1;

                         auto ptr = dynamic_cast<MipsISA::TLB *>(
-                            xc->tcBase()->getITBPtr());
+                            xc->tcBase()->getMMUPtr()->itb);
                         Config3Reg config3 = Config3;
                         PageGrainReg pageGrain = PageGrain;
                         int SP = 0;
@@ -909,7 +909,7 @@
                             vpn = ((EntryHi >> 11) & 0xFFFFFFFC);
                         }
                         tlbIndex = dynamic_cast<MipsISA::TLB *>(
-                            xc->tcBase()->getITBPtr())->
+                            xc->tcBase()->getMMUPtr()->itb)->
                             probeEntry(vpn, entryHi.asid);
                         // Check TLB for entry matching EntryHi
                         if (tlbIndex != -1) {
diff --git a/src/arch/mips/isa/includes.isa b/src/arch/mips/isa/includes.isa
index 53b1055..34922e4 100644
--- a/src/arch/mips/isa/includes.isa
+++ b/src/arch/mips/isa/includes.isa
@@ -76,6 +76,7 @@
 #include "arch/mips/dt_constants.hh"
 #include "arch/mips/faults.hh"
 #include "arch/mips/isa_traits.hh"
+#include "arch/mips/mmu.hh"
 #include "arch/mips/mt.hh"
 #include "arch/mips/mt_constants.hh"
 #include "arch/mips/pagetable.hh"

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/36995
To unsubscribe, or for help writing mail filters, visit  
https://gem5-review.googlesource.com/settings

Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I2bd1a6a8607fe1da056182ca840036db35b53c36
Gerrit-Change-Number: 36995
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <gabe.bl...@gmail.com>
Gerrit-MessageType: newchange
_______________________________________________
gem5-dev mailing list -- gem5-dev@gem5.org
To unsubscribe send an email to gem5-dev-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s