Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/38480 )
Change subject: dev: Style fixes in src/dev/dma_device.(cc|hh).
......................................................................
dev: Style fixes in src/dev/dma_device.(cc|hh).
Change-Id: Ie72f30d95e7f889f9a440d0fed57a5940747b40d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38480
Reviewed-by: Daniel Carvalho <oda...@yahoo.com.br>
Maintainer: Gabe Black <gabe.bl...@gmail.com>
Tested-by: kokoro <noreply+kok...@google.com>
---
M src/dev/dma_device.cc
M src/dev/dma_device.hh
2 files changed, 55 insertions(+), 55 deletions(-)
Approvals:
Daniel Carvalho: Looks good to me, approved
Gabe Black: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/dev/dma_device.cc b/src/dev/dma_device.cc
index ba20366..efa9ef7 100644
--- a/src/dev/dma_device.cc
+++ b/src/dev/dma_device.cc
@@ -54,9 +54,7 @@
: RequestPort(dev->name() + ".dma", dev),
device(dev), sys(s), requestorId(s->getRequestorId(dev)),
sendEvent([this]{ sendDma(); }, dev->name()),
- pendingCount(0), inRetry(false),
- defaultSid(sid),
- defaultSSid(ssid)
+ defaultSid(sid), defaultSSid(ssid)
{ }
void
@@ -66,7 +64,7 @@
assert(pkt->isResponse());
// get the DMA sender state
- DmaReqState *state = dynamic_cast<DmaReqState*>(pkt->senderState);
+ auto *state = dynamic_cast<DmaReqState*>(pkt->senderState);
assert(state);
DPRINTF(DMA, "Received response %s for addr: %#x size: %d nb: %d," \
@@ -121,8 +119,8 @@
void
DmaDevice::init()
{
- if (!dmaPort.isConnected())
- panic("DMA port of %s not connected to anything!", name());
+ panic_if(!dmaPort.isConnected(),
+ "DMA port of %s not connected to anything!", name());
PioDevice::init();
}
@@ -158,7 +156,7 @@
// We're only interested in this when there will only be one request.
// For simplicity, we return the last request, which would also be
// the only request in that case.
- RequestPtr req = NULL;
+ RequestPtr req = nullptr;
DPRINTF(DMA, "Starting DMA for addr: %#x size: %d sched: %d\n", addr,
size,
event ? event->scheduled() : -1);
@@ -269,8 +267,9 @@
handleResp(pkt, lat);
}
- } else
+ } else {
panic("Unknown memory mode.");
+ }
}
Port &
@@ -287,9 +286,7 @@
unsigned max_pending,
Request::Flags flags)
: maxReqSize(max_req_size), fifoSize(size),
- reqFlags(flags), port(_port),
- buffer(size),
- nextAddr(0), endAddr(0)
+ reqFlags(flags), port(_port), buffer(size)
{
freeRequests.resize(max_pending);
for (auto &e : freeRequests)
@@ -346,8 +343,7 @@
void
DmaReadFifo::get(uint8_t *dst, size_t len)
{
- const bool success(tryGet(dst, len));
- panic_if(!success, "Buffer underrun in DmaReadFifo::get()\n");
+ panic_if(!tryGet(dst, len), "Buffer underrun in DmaReadFifo::get()");
}
void
@@ -473,13 +469,13 @@
DrainState
DmaReadFifo::drain()
{
- return pendingRequests.empty() ? DrainState::Drained :
DrainState::Draining;
+ return pendingRequests.empty() ?
+ DrainState::Drained : DrainState::Draining;
}
-DmaReadFifo::DmaDoneEvent::DmaDoneEvent(DmaReadFifo *_parent,
- size_t max_size)
- : parent(_parent), _done(false), _canceled(false), _data(max_size, 0)
+DmaReadFifo::DmaDoneEvent::DmaDoneEvent(DmaReadFifo *_parent, size_t
max_size)
+ : parent(_parent), _data(max_size, 0)
{
}
diff --git a/src/dev/dma_device.hh b/src/dev/dma_device.hh
index 53ceff0..9752c21 100644
--- a/src/dev/dma_device.hh
+++ b/src/dev/dma_device.hh
@@ -83,7 +83,7 @@
* @param pkt Response packet to handler
* @param delay Additional delay for scheduling the completion event
*/
- void handleResp(PacketPtr pkt, Tick delay = 0);
+ void handleResp(PacketPtr pkt, Tick delay=0);
struct DmaReqState : public Packet::SenderState
{
@@ -95,13 +95,13 @@
const Addr totBytes;
/** Number of bytes that have been acked for this transaction. */
- Addr numBytes;
+ Addr numBytes = 0;
/** Amount to delay completion of dma by */
const Tick delay;
DmaReqState(Event *ce, Addr tb, Tick _delay)
- : completionEvent(ce), totBytes(tb), numBytes(0), delay(_delay)
+ : completionEvent(ce), totBytes(tb), delay(_delay)
{}
};
@@ -124,11 +124,11 @@
EventFunctionWrapper sendEvent;
/** Number of outstanding packets the dma port has. */
- uint32_t pendingCount;
+ uint32_t pendingCount = 0;
/** If the port is currently waiting for a retry before it can
* send whatever it is that it's sending. */
- bool inRetry;
+ bool inRetry = false;
/** Default streamId */
const uint32_t defaultSid;
@@ -145,17 +145,16 @@
public:
- DmaPort(ClockedObject *dev, System *s,
- uint32_t sid = 0, uint32_t ssid = 0);
+ DmaPort(ClockedObject *dev, System *s, uint32_t sid=0, uint32_t
ssid=0);
RequestPtr
dmaAction(Packet::Command cmd, Addr addr, int size, Event *event,
- uint8_t *data, Tick delay, Request::Flags flag = 0);
+ uint8_t *data, Tick delay, Request::Flags flag=0);
RequestPtr
dmaAction(Packet::Command cmd, Addr addr, int size, Event *event,
uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay,
- Request::Flags flag = 0);
+ Request::Flags flag=0);
bool dmaPending() const { return pendingCount > 0; }
@@ -170,30 +169,32 @@
public:
typedef DmaDeviceParams Params;
DmaDevice(const Params &p);
- virtual ~DmaDevice() { }
+ virtual ~DmaDevice() = default;
- void dmaWrite(Addr addr, int size, Event *event, uint8_t *data,
- uint32_t sid, uint32_t ssid, Tick delay = 0)
+ void
+ dmaWrite(Addr addr, int size, Event *event, uint8_t *data,
+ uint32_t sid, uint32_t ssid, Tick delay=0)
{
dmaPort.dmaAction(MemCmd::WriteReq, addr, size, event, data,
sid, ssid, delay);
}
- void dmaWrite(Addr addr, int size, Event *event, uint8_t *data,
- Tick delay = 0)
+ void
+ dmaWrite(Addr addr, int size, Event *event, uint8_t *data, Tick
delay=0)
{
dmaPort.dmaAction(MemCmd::WriteReq, addr, size, event, data,
delay);
}
- void dmaRead(Addr addr, int size, Event *event, uint8_t *data,
- uint32_t sid, uint32_t ssid, Tick delay = 0)
+ void
+ dmaRead(Addr addr, int size, Event *event, uint8_t *data,
+ uint32_t sid, uint32_t ssid, Tick delay=0)
{
dmaPort.dmaAction(MemCmd::ReadReq, addr, size, event, data,
sid, ssid, delay);
}
- void dmaRead(Addr addr, int size, Event *event, uint8_t *data,
- Tick delay = 0)
+ void
+ dmaRead(Addr addr, int size, Event *event, uint8_t *data, Tick delay=0)
{
dmaPort.dmaAction(MemCmd::ReadReq, addr, size, event, data, delay);
}
@@ -229,19 +230,16 @@
* complete until count is 0, which ensures that all outstanding
* DmaChunkEvents associated with this DmaCallback have fired.
*/
- DrainState drain() override
+ DrainState
+ drain() override
{
return count ? DrainState::Draining : DrainState::Drained;
}
protected:
- int count;
+ int count = 0;
- DmaCallback()
- : count(0)
- { }
-
- virtual ~DmaCallback() { }
+ virtual ~DmaCallback() = default;
/**
* Callback function invoked on completion of all chunks.
@@ -254,7 +252,8 @@
* Since the object may delete itself here, callers should not use
* the object pointer after calling this function.
*/
- void chunkComplete()
+ void
+ chunkComplete()
{
if (--count == 0) {
process();
@@ -271,7 +270,8 @@
* Request a chunk event. Chunks events should be provided to each DMA
* request that wishes to participate in this DmaCallback.
*/
- Event *getChunkEvent()
+ Event *
+ getChunkEvent()
{
++count;
return new EventFunctionWrapper([this]{ chunkComplete(); }, name(),
@@ -328,7 +328,7 @@
DmaReadFifo(DmaPort &port, size_t size,
unsigned max_req_size,
unsigned max_pending,
- Request::Flags flags = 0);
+ Request::Flags flags=0);
~DmaReadFifo();
@@ -359,7 +359,9 @@
bool tryGet(uint8_t *dst, size_t len);
template<typename T>
- bool tryGet(T &value) {
+ bool
+ tryGet(T &value)
+ {
return tryGet(static_cast<T *>(&value), sizeof(T));
};
@@ -374,7 +376,9 @@
void get(uint8_t *dst, size_t len);
template<typename T>
- T get() {
+ T
+ get()
+ {
T value;
get(static_cast<uint8_t *>(&value), sizeof(T));
return value;
@@ -417,15 +421,15 @@
* Has the DMA engine sent out the last request for the active
* block?
*/
- bool atEndOfBlock() const {
- return nextAddr == endAddr;
- }
+ bool atEndOfBlock() const { return nextAddr == endAddr; }
/**
* Is the DMA engine active (i.e., are there still in-flight
* accesses)?
*/
- bool isActive() const {
+ bool
+ isActive() const
+ {
return !(pendingRequests.empty() && atEndOfBlock());
}
@@ -487,8 +491,8 @@
private:
DmaReadFifo *parent;
- bool _done;
- bool _canceled;
+ bool _done = false;
+ bool _canceled = false;
size_t _requestSize;
std::vector<uint8_t> _data;
};
@@ -516,8 +520,8 @@
private: // Internal state
Fifo<uint8_t> buffer;
- Addr nextAddr;
- Addr endAddr;
+ Addr nextAddr = 0;
+ Addr endAddr = 0;
std::deque<DmaDoneEventUPtr> pendingRequests;
std::deque<DmaDoneEventUPtr> freeRequests;
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/38480
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ie72f30d95e7f889f9a440d0fed57a5940747b40d
Gerrit-Change-Number: 38480
Gerrit-PatchSet: 6
Gerrit-Owner: Gabe Black <gabe.bl...@gmail.com>
Gerrit-Reviewer: Alexandru Duțu <alexandru.d...@amd.com>
Gerrit-Reviewer: Daniel Carvalho <oda...@yahoo.com.br>
Gerrit-Reviewer: Gabe Black <gabe.bl...@gmail.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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