Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/39560 )

Change subject: arch-sparc: Stop "using namespace std"
......................................................................

arch-sparc: Stop "using namespace std"

Change-Id: I4a1019b5978b08b4999edfe5f65ef7eae06481c2
---
M src/arch/sparc/faults.cc
M src/arch/sparc/isa/includes.isa
M src/arch/sparc/process.cc
M src/arch/sparc/remote_gdb.cc
M src/arch/sparc/ua2005.cc
5 files changed, 6 insertions(+), 12 deletions(-)



diff --git a/src/arch/sparc/faults.cc b/src/arch/sparc/faults.cc
index b480558..a80e649 100644
--- a/src/arch/sparc/faults.cc
+++ b/src/arch/sparc/faults.cc
@@ -42,8 +42,6 @@
 #include "sim/full_system.hh"
 #include "sim/process.hh"

-using namespace std;
-
 namespace SparcISA
 {

@@ -340,7 +338,7 @@
     tc->setMiscRegNoEffect(MISCREG_TT, tt);

     // Update GL
-    tc->setMiscReg(MISCREG_GL, min<int>(GL+1, MaxGL));
+    tc->setMiscReg(MISCREG_GL, std::min<int>(GL+1, MaxGL));

     bool priv = pstate.priv; // just save the priv bit
     pstate = 0;
@@ -424,9 +422,9 @@

     // Update the global register level
     if (!gotoHpriv)
-        tc->setMiscReg(MISCREG_GL, min<int>(GL + 1, MaxPGL));
+        tc->setMiscReg(MISCREG_GL, std::min<int>(GL + 1, MaxPGL));
     else
-        tc->setMiscReg(MISCREG_GL, min<int>(GL + 1, MaxGL));
+        tc->setMiscReg(MISCREG_GL, std::min<int>(GL + 1, MaxGL));

     // pstate.mm is unchanged
     pstate.pef = 1; // PSTATE.pef = whether or not an fpu is present
diff --git a/src/arch/sparc/isa/includes.isa b/src/arch/sparc/isa/includes.isa
index da814e3..1cef0fc 100644
--- a/src/arch/sparc/isa/includes.isa
+++ b/src/arch/sparc/isa/includes.isa
@@ -86,6 +86,5 @@
 #include "sim/sim_exit.hh"

 using namespace SparcISA;
-using namespace std;
 }};

diff --git a/src/arch/sparc/process.cc b/src/arch/sparc/process.cc
index b292c86..0923eeb 100644
--- a/src/arch/sparc/process.cc
+++ b/src/arch/sparc/process.cc
@@ -45,7 +45,6 @@
 #include "sim/syscall_return.hh"
 #include "sim/system.hh"

-using namespace std;
 using namespace SparcISA;

 SparcProcess::SparcProcess(const ProcessParams &params,
@@ -142,7 +141,7 @@

     std::vector<AuxVector<IntType>> auxv;

-    string filename;
+    std::string filename;
     if (argv.size() < 1)
         filename = "";
     else
diff --git a/src/arch/sparc/remote_gdb.cc b/src/arch/sparc/remote_gdb.cc
index cf91f3d..a2988c6 100644
--- a/src/arch/sparc/remote_gdb.cc
+++ b/src/arch/sparc/remote_gdb.cc
@@ -140,7 +140,6 @@
 #include "sim/process.hh"
 #include "sim/system.hh"

-using namespace std;
 using namespace SparcISA;

 RemoteGDB::RemoteGDB(System *_system, ThreadContext *c, int _port)
diff --git a/src/arch/sparc/ua2005.cc b/src/arch/sparc/ua2005.cc
index b0b9f59..3f33816 100644
--- a/src/arch/sparc/ua2005.cc
+++ b/src/arch/sparc/ua2005.cc
@@ -38,7 +38,6 @@
 #include "sim/system.hh"

 using namespace SparcISA;
-using namespace std;


 void
@@ -66,10 +65,10 @@
 }

 // These functions map register indices to names
-static inline string
+static inline std::string
 getMiscRegName(RegIndex index)
 {
-    static string miscRegName[NumMiscRegs] =
+    static std::string miscRegName[NumMiscRegs] =
         {/*"y", "ccr",*/ "asi", "tick", "fprs", "pcr", "pic",
          "gsr", "softint_set", "softint_clr", "softint", "tick_cmpr",
          "stick", "stick_cmpr",

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/39560
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I4a1019b5978b08b4999edfe5f65ef7eae06481c2
Gerrit-Change-Number: 39560
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-MessageType: newchange
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