Giacomo Travaglini has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/39899 )
Change subject: misc: Remove redundant _params
......................................................................
misc: Remove redundant _params
Instead of creating yet another _params field, SimObject descendants
should use params() to expose the real type of SimObject::_params they
already have.
Change-Id: I36308e65df9ba3dafdd3fea3e3897cc3073718b4
Signed-off-by: Alexander Klimov <alexander.kli...@arm.com>
---
M src/arch/arm/fastmodel/CortexA76/cortex_a76.cc
M src/arch/arm/fastmodel/CortexA76/cortex_a76.hh
M src/arch/arm/fastmodel/CortexR52/cortex_r52.cc
M src/arch/arm/fastmodel/CortexR52/cortex_r52.hh
M src/arch/arm/fastmodel/GIC/gic.cc
M src/arch/arm/fastmodel/GIC/gic.hh
M src/arch/arm/freebsd/se_workload.hh
M src/arch/arm/linux/se_workload.hh
M src/arch/arm/se_workload.hh
M src/arch/mips/linux/se_workload.hh
M src/arch/mips/se_workload.hh
M src/arch/power/linux/se_workload.hh
M src/arch/power/se_workload.hh
M src/arch/riscv/linux/se_workload.hh
M src/arch/riscv/se_workload.hh
M src/arch/sparc/linux/se_workload.cc
M src/arch/sparc/linux/se_workload.hh
M src/arch/x86/linux/se_workload.cc
M src/arch/x86/linux/se_workload.hh
M src/cpu/checker/cpu.cc
M src/cpu/checker/cpu.hh
M src/dev/arm/base_gic.cc
M src/dev/arm/base_gic.hh
M src/dev/arm/generic_timer.cc
M src/sim/kernel_workload.cc
M src/sim/kernel_workload.hh
M src/sim/se_workload.cc
M src/sim/se_workload.hh
M src/sim/sim_object.hh
M src/sim/system.cc
M src/sim/system.hh
M src/sim/workload.hh
32 files changed, 46 insertions(+), 144 deletions(-)
diff --git a/src/arch/arm/fastmodel/CortexA76/cortex_a76.cc
b/src/arch/arm/fastmodel/CortexA76/cortex_a76.cc
index d2b9676..58426fb 100644
--- a/src/arch/arm/fastmodel/CortexA76/cortex_a76.cc
+++ b/src/arch/arm/fastmodel/CortexA76/cortex_a76.cc
@@ -99,7 +99,7 @@
}
CortexA76Cluster::CortexA76Cluster(const Params &p) :
- SimObject(p), _params(p), cores(p.cores), evs(p.evs)
+ SimObject(p), cores(p.cores), evs(p.evs)
{
for (int i = 0; i < p.cores.size(); i++)
p.cores[i]->setCluster(this, i);
diff --git a/src/arch/arm/fastmodel/CortexA76/cortex_a76.hh
b/src/arch/arm/fastmodel/CortexA76/cortex_a76.hh
index 68ff1a8..542b8bb 100644
--- a/src/arch/arm/fastmodel/CortexA76/cortex_a76.hh
+++ b/src/arch/arm/fastmodel/CortexA76/cortex_a76.hh
@@ -52,18 +52,15 @@
class CortexA76 : public Iris::CPU<CortexA76TC>
{
protected:
- typedef FastModelCortexA76Params Params;
typedef Iris::CPU<CortexA76TC> Base;
- const Params &_params;
CortexA76Cluster *cluster = nullptr;
int num = 0;
- const Params ¶ms() { return _params; }
-
public:
+ PARAMS(FastModelCortexA76);
CortexA76(const Params &p) :
- Base(p, scx::scx_get_iris_connection_interface()), _params(p)
+ Base(p, scx::scx_get_iris_connection_interface())
{}
void
@@ -93,13 +90,11 @@
class CortexA76Cluster : public SimObject
{
private:
- typedef FastModelCortexA76ClusterParams Params;
- const Params &_params;
-
std::vector<CortexA76 *> cores;
sc_core::sc_module *evs;
public:
+ PARAMS(FastModelCortexA76Cluster);
template <class T>
void
set_evs_param(const std::string &n, T val)
@@ -111,7 +106,6 @@
sc_core::sc_module *getEvs() const { return evs; }
CortexA76Cluster(const Params &p);
- const Params ¶ms() { return _params; }
Port &getPort(const std::string &if_name,
PortID idx=InvalidPortID) override;
diff --git a/src/arch/arm/fastmodel/CortexR52/cortex_r52.cc
b/src/arch/arm/fastmodel/CortexR52/cortex_r52.cc
index 18bb33d..84fce1a 100644
--- a/src/arch/arm/fastmodel/CortexR52/cortex_r52.cc
+++ b/src/arch/arm/fastmodel/CortexR52/cortex_r52.cc
@@ -94,7 +94,7 @@
}
CortexR52Cluster::CortexR52Cluster(const Params &p) :
- SimObject(p), _params(p), cores(p.cores), evs(p.evs)
+ SimObject(p), cores(p.cores), evs(p.evs)
{
for (int i = 0; i < p.cores.size(); i++)
p.cores[i]->setCluster(this, i);
diff --git a/src/arch/arm/fastmodel/CortexR52/cortex_r52.hh
b/src/arch/arm/fastmodel/CortexR52/cortex_r52.hh
index 8332066..bf19e51 100644
--- a/src/arch/arm/fastmodel/CortexR52/cortex_r52.hh
+++ b/src/arch/arm/fastmodel/CortexR52/cortex_r52.hh
@@ -52,18 +52,15 @@
class CortexR52 : public Iris::CPU<CortexR52TC>
{
protected:
- typedef FastModelCortexR52Params Params;
typedef Iris::CPU<CortexR52TC> Base;
- const Params &_params;
CortexR52Cluster *cluster = nullptr;
int num = 0;
- const Params ¶ms() { return _params; }
-
public:
+ PARAMS(FastModelCortexR52);
CortexR52(const Params &p) :
- Base(p, scx::scx_get_iris_connection_interface()), _params(p)
+ Base(p, scx::scx_get_iris_connection_interface())
{}
template <class T>
@@ -78,9 +75,6 @@
class CortexR52Cluster : public SimObject
{
private:
- typedef FastModelCortexR52ClusterParams Params;
- const Params &_params;
-
std::vector<CortexR52 *> cores;
sc_core::sc_module *evs;
@@ -95,8 +89,8 @@
CortexR52 *getCore(int num) const { return cores.at(num); }
sc_core::sc_module *getEvs() const { return evs; }
+ PARAMS(FastModelCortexR52Cluster);
CortexR52Cluster(const Params &p);
- const Params ¶ms() { return _params; }
Port &getPort(const std::string &if_name,
PortID idx=InvalidPortID) override;
diff --git a/src/arch/arm/fastmodel/GIC/gic.cc
b/src/arch/arm/fastmodel/GIC/gic.cc
index c34fc02..11bc482 100644
--- a/src/arch/arm/fastmodel/GIC/gic.cc
+++ b/src/arch/arm/fastmodel/GIC/gic.cc
@@ -69,7 +69,7 @@
SCGIC::SCGIC(const SCFastModelGICParams ¶ms,
sc_core::sc_module_name _name)
- : scx_evs_GIC(_name), _params(params)
+ : scx_evs_GIC(_name)
{
signalInterrupt.bind(signal_interrupt);
diff --git a/src/arch/arm/fastmodel/GIC/gic.hh
b/src/arch/arm/fastmodel/GIC/gic.hh
index 683695e..b8c75d5 100644
--- a/src/arch/arm/fastmodel/GIC/gic.hh
+++ b/src/arch/arm/fastmodel/GIC/gic.hh
@@ -80,7 +80,6 @@
};
std::unique_ptr<Terminator> terminator;
- const SCFastModelGICParams &_params;
public:
SCGIC(const SCFastModelGICParams &p) : SCGIC(p, p.name.c_str()) {}
@@ -97,11 +96,7 @@
scx_evs_GIC::start_of_simulation();
}
void start_of_simulation() override {}
- const SCFastModelGICParams &
- params()
- {
- return _params;
- }
+ PARAMS(SCFastModelGIC);
};
// This class pairs with the one above to implement the receiving end of
gem5's
diff --git a/src/arch/arm/freebsd/se_workload.hh
b/src/arch/arm/freebsd/se_workload.hh
index cc10041..82d3659 100644
--- a/src/arch/arm/freebsd/se_workload.hh
+++ b/src/arch/arm/freebsd/se_workload.hh
@@ -46,15 +46,9 @@
class EmuFreebsd : public SEWorkload
{
public:
- using Params = ArmEmuFreebsdParams;
+ PARAMS(ArmEmuFreebsd);
- protected:
- const Params &_params;
-
- public:
- const Params ¶ms() const { return _params; }
-
- EmuFreebsd(const Params &p) : SEWorkload(p), _params(p) {}
+ EmuFreebsd(const Params &p) : SEWorkload(p) {}
struct BaseSyscallABI {};
struct SyscallABI32 : public SEWorkload::SyscallABI32,
diff --git a/src/arch/arm/linux/se_workload.hh
b/src/arch/arm/linux/se_workload.hh
index 9d15d59..1473803 100644
--- a/src/arch/arm/linux/se_workload.hh
+++ b/src/arch/arm/linux/se_workload.hh
@@ -40,15 +40,8 @@
class EmuLinux : public SEWorkload
{
public:
- using Params = ArmEmuLinuxParams;
-
- protected:
- const Params &_params;
-
- public:
- const Params ¶ms() const { return _params; }
-
- EmuLinux(const Params &p) : SEWorkload(p), _params(p) {}
+ PARAMS(ArmEmuLinux);
+ EmuLinux(const Params &p) : SEWorkload(p) {}
struct BaseSyscallABI {};
struct SyscallABI32 : public SEWorkload::SyscallABI32,
diff --git a/src/arch/arm/se_workload.hh b/src/arch/arm/se_workload.hh
index 8538edd..8f6b639 100644
--- a/src/arch/arm/se_workload.hh
+++ b/src/arch/arm/se_workload.hh
@@ -38,15 +38,8 @@
class SEWorkload : public ::SEWorkload
{
public:
- using Params = ArmSEWorkloadParams;
-
- protected:
- const Params &_params;
-
- public:
- const Params ¶ms() const { return _params; }
-
- SEWorkload(const Params &p) : ::SEWorkload(p), _params(p) {}
+ PARAMS(ArmSEWorkload);
+ SEWorkload(const Params &p) : ::SEWorkload(p) {}
::Loader::Arch getArch() const override { return ::Loader::Arm64; }
diff --git a/src/arch/mips/linux/se_workload.hh
b/src/arch/mips/linux/se_workload.hh
index 7e1353e..2a21c7c 100644
--- a/src/arch/mips/linux/se_workload.hh
+++ b/src/arch/mips/linux/se_workload.hh
@@ -39,19 +39,14 @@
class EmuLinux : public SEWorkload
{
- public:
- using Params = MipsEmuLinuxParams;
-
protected:
- const Params &_params;
-
/// Syscall descriptors, indexed by call number.
static SyscallDescTable<SyscallABI> syscallDescs;
public:
- const Params ¶ms() const { return _params; }
+ PARAMS(MipsEmuLinux);
- EmuLinux(const Params &p) : SEWorkload(p), _params(p) {}
+ EmuLinux(const Params &p) : SEWorkload(p) {}
void syscall(ThreadContext *tc) override;
};
diff --git a/src/arch/mips/se_workload.hh b/src/arch/mips/se_workload.hh
index 53c1cbe..18e054b 100644
--- a/src/arch/mips/se_workload.hh
+++ b/src/arch/mips/se_workload.hh
@@ -40,15 +40,9 @@
class SEWorkload : public ::SEWorkload
{
public:
- using Params = MipsSEWorkloadParams;
+ PARAMS(MipsSEWorkload);
- protected:
- const Params &_params;
-
- public:
- const Params ¶ms() const { return _params; }
-
- SEWorkload(const Params &p) : ::SEWorkload(p), _params(p) {}
+ SEWorkload(const Params &p) : ::SEWorkload(p) {}
::Loader::Arch getArch() const override { return ::Loader::Mips; }
diff --git a/src/arch/power/linux/se_workload.hh
b/src/arch/power/linux/se_workload.hh
index ac20e5d..1886f7c 100644
--- a/src/arch/power/linux/se_workload.hh
+++ b/src/arch/power/linux/se_workload.hh
@@ -40,19 +40,14 @@
class EmuLinux : public SEWorkload
{
- public:
- using Params = PowerEmuLinuxParams;
-
protected:
- const Params &_params;
-
/// Syscall descriptors, indexed by call number.
static SyscallDescTable<SEWorkload::SyscallABI> syscallDescs;
public:
- const Params ¶ms() const { return _params; }
+ PARAMS(PowerEmuLinux);
- EmuLinux(const Params &p) : SEWorkload(p), _params(p) {}
+ EmuLinux(const Params &p) : SEWorkload(p) {}
void syscall(ThreadContext *tc) override;
};
diff --git a/src/arch/power/se_workload.hh b/src/arch/power/se_workload.hh
index 5f3630c..6093823 100644
--- a/src/arch/power/se_workload.hh
+++ b/src/arch/power/se_workload.hh
@@ -40,15 +40,8 @@
class SEWorkload : public ::SEWorkload
{
public:
- using Params = PowerSEWorkloadParams;
-
- protected:
- const Params &_params;
-
- public:
- const Params ¶ms() const { return _params; }
-
- SEWorkload(const Params &p) : ::SEWorkload(p), _params(p) {}
+ PARAMS(PowerSEWorkload);
+ SEWorkload(const Params &p) : ::SEWorkload(p) {}
::Loader::Arch getArch() const override { return ::Loader::Power; }
diff --git a/src/arch/riscv/linux/se_workload.hh
b/src/arch/riscv/linux/se_workload.hh
index 881ba33..e6110bb 100644
--- a/src/arch/riscv/linux/se_workload.hh
+++ b/src/arch/riscv/linux/se_workload.hh
@@ -40,11 +40,7 @@
class EmuLinux : public SEWorkload
{
- public:
- using Params = RiscvEmuLinuxParams;
-
protected:
- const Params &_params;
/// 64 bit syscall descriptors, indexed by call number.
static SyscallDescTable<SEWorkload::SyscallABI> syscallDescs64;
@@ -53,9 +49,9 @@
static SyscallDescTable<SEWorkload::SyscallABI> syscallDescs32;
public:
- const Params ¶ms() const { return _params; }
+ PARAMS(RiscvEmuLinux);
- EmuLinux(const Params &p) : SEWorkload(p), _params(p) {}
+ EmuLinux(const Params &p) : SEWorkload(p) {}
void syscall(ThreadContext *tc) override;
};
diff --git a/src/arch/riscv/se_workload.hh b/src/arch/riscv/se_workload.hh
index d6df19c..20f108f 100644
--- a/src/arch/riscv/se_workload.hh
+++ b/src/arch/riscv/se_workload.hh
@@ -40,15 +40,9 @@
class SEWorkload : public ::SEWorkload
{
public:
- using Params = RiscvSEWorkloadParams;
+ PARAMS(RiscvSEWorkload);
- protected:
- const Params &_params;
-
- public:
- const Params ¶ms() const { return _params; }
-
- SEWorkload(const Params &p) : ::SEWorkload(p), _params(p) {}
+ SEWorkload(const Params &p) : ::SEWorkload(p) {}
::Loader::Arch getArch() const override { return ::Loader::Riscv64; }
diff --git a/src/arch/sparc/linux/se_workload.cc
b/src/arch/sparc/linux/se_workload.cc
index c8d08bb..848f64b 100644
--- a/src/arch/sparc/linux/se_workload.cc
+++ b/src/arch/sparc/linux/se_workload.cc
@@ -73,7 +73,7 @@
namespace SparcISA
{
-EmuLinux::EmuLinux(const Params &p) : SEWorkload(p), _params(p)
+EmuLinux::EmuLinux(const Params &p) : SEWorkload(p)
{}
void
diff --git a/src/arch/sparc/linux/se_workload.hh
b/src/arch/sparc/linux/se_workload.hh
index 60a4be6..5e10b4f 100644
--- a/src/arch/sparc/linux/se_workload.hh
+++ b/src/arch/sparc/linux/se_workload.hh
@@ -39,12 +39,7 @@
class EmuLinux : public SEWorkload
{
- public:
- using Params = SparcEmuLinuxParams;
-
protected:
- const Params &_params;
-
/// 64 bit syscall descriptors, indexed by call number.
static SyscallDescTable<SEWorkload::SyscallABI64> syscallDescs;
@@ -55,7 +50,7 @@
void syscall32(ThreadContext *tc);
public:
- const Params ¶ms() const { return _params; }
+ PARAMS(SparcEmuLinux);
EmuLinux(const Params &p);
diff --git a/src/arch/x86/linux/se_workload.cc
b/src/arch/x86/linux/se_workload.cc
index 72170f7..7d2ae5a 100644
--- a/src/arch/x86/linux/se_workload.cc
+++ b/src/arch/x86/linux/se_workload.cc
@@ -89,7 +89,7 @@
namespace X86ISA
{
-EmuLinux::EmuLinux(const Params &p) : SEWorkload(p), _params(p)
+EmuLinux::EmuLinux(const Params &p) : SEWorkload(p)
{}
const std::vector<IntRegIndex> EmuLinux::SyscallABI64::ArgumentRegs = {
diff --git a/src/arch/x86/linux/se_workload.hh
b/src/arch/x86/linux/se_workload.hh
index c1cd234..0fed80f 100644
--- a/src/arch/x86/linux/se_workload.hh
+++ b/src/arch/x86/linux/se_workload.hh
@@ -52,13 +52,7 @@
class EmuLinux : public SEWorkload
{
public:
- using Params = X86EmuLinuxParams;
-
- protected:
- const Params &_params;
-
- public:
- const Params ¶ms() const { return _params; }
+ PARAMS(X86EmuLinux);
EmuLinux(const Params &p);
diff --git a/src/cpu/checker/cpu.cc b/src/cpu/checker/cpu.cc
index a9baf88..52daea9 100644
--- a/src/cpu/checker/cpu.cc
+++ b/src/cpu/checker/cpu.cc
@@ -90,7 +90,7 @@
void
CheckerCPU::setSystem(System *system)
{
- const Params &p = dynamic_cast<const Params &>(_params);
+ const Params &p = params();
systemPtr = system;
diff --git a/src/cpu/checker/cpu.hh b/src/cpu/checker/cpu.hh
index 6cf69a8..42a38fc 100644
--- a/src/cpu/checker/cpu.hh
+++ b/src/cpu/checker/cpu.hh
@@ -91,7 +91,7 @@
public:
void init() override;
- typedef CheckerCPUParams Params;
+ PARAMS(CheckerCPU);
CheckerCPU(const Params &p);
virtual ~CheckerCPU();
diff --git a/src/dev/arm/base_gic.cc b/src/dev/arm/base_gic.cc
index 8229a55..f94cb97 100644
--- a/src/dev/arm/base_gic.cc
+++ b/src/dev/arm/base_gic.cc
@@ -109,8 +109,7 @@
return pin_it->second;
} else {
// Generate PPI Pin
- auto &p = static_cast<const ArmPPIParams &>(_params);
- ArmPPI *pin = new ArmPPI(p, tc);
+ ArmPPI *pin = new ArmPPI(ArmPPIGen::params(), tc);
pins.insert({cid, pin});
diff --git a/src/dev/arm/base_gic.hh b/src/dev/arm/base_gic.hh
index 4eef85b..587744e 100644
--- a/src/dev/arm/base_gic.hh
+++ b/src/dev/arm/base_gic.hh
@@ -165,6 +165,7 @@
class ArmPPIGen : public ArmInterruptPinGen
{
public:
+ PARAMS(ArmPPI);
ArmPPIGen(const ArmPPIParams &p);
ArmInterruptPin* get(ThreadContext* tc = nullptr) override;
diff --git a/src/dev/arm/generic_timer.cc b/src/dev/arm/generic_timer.cc
index a8b5cc5..fbfb6a7 100644
--- a/src/dev/arm/generic_timer.cc
+++ b/src/dev/arm/generic_timer.cc
@@ -469,7 +469,7 @@
GenericTimer::createTimers(unsigned cpus)
{
assert(timers.size() < cpus);
- auto &p = static_cast<const GenericTimerParams &>(_params);
+ auto &p = params();
const unsigned old_cpu_count(timers.size());
timers.resize(cpus);
diff --git a/src/sim/kernel_workload.cc b/src/sim/kernel_workload.cc
index 14e8b02..434e317 100644
--- a/src/sim/kernel_workload.cc
+++ b/src/sim/kernel_workload.cc
@@ -31,7 +31,7 @@
#include "params/KernelWorkload.hh"
#include "sim/system.hh"
-KernelWorkload::KernelWorkload(const Params &p) : Workload(p), _params(p),
+KernelWorkload::KernelWorkload(const Params &p) : Workload(p),
_loadAddrMask(p.load_addr_mask), _loadAddrOffset(p.load_addr_offset),
commandLine(p.command_line)
{
diff --git a/src/sim/kernel_workload.hh b/src/sim/kernel_workload.hh
index e2aff08..c8e3a53 100644
--- a/src/sim/kernel_workload.hh
+++ b/src/sim/kernel_workload.hh
@@ -41,12 +41,7 @@
class KernelWorkload : public Workload
{
- public:
- using Params = KernelWorkloadParams;
-
protected:
- const Params &_params;
-
Loader::MemoryImage image;
/** Mask that should be anded for binary/symbol loading.
@@ -76,7 +71,7 @@
const std::string commandLine;
public:
- const Params ¶ms() const { return _params; }
+ PARAMS(KernelWorkload);
Addr start() const { return _start; }
Addr end() const { return _end; }
diff --git a/src/sim/se_workload.cc b/src/sim/se_workload.cc
index a596bd8..655682f 100644
--- a/src/sim/se_workload.cc
+++ b/src/sim/se_workload.cc
@@ -31,7 +31,7 @@
#include "params/SEWorkload.hh"
#include "sim/process.hh"
-SEWorkload::SEWorkload(const Params &p) : Workload(p), _params(p)
+SEWorkload::SEWorkload(const Params &p) : Workload(p)
{}
void
diff --git a/src/sim/se_workload.hh b/src/sim/se_workload.hh
index 16c3f22..dc3a3d3 100644
--- a/src/sim/se_workload.hh
+++ b/src/sim/se_workload.hh
@@ -34,13 +34,7 @@
class SEWorkload : public Workload
{
public:
- using Params = SEWorkloadParams;
-
- protected:
- const Params &_params;
-
- public:
- const Params ¶ms() const { return _params; }
+ PARAMS(SEWorkload);
SEWorkload(const Params &p);
diff --git a/src/sim/sim_object.hh b/src/sim/sim_object.hh
index 1e1d553..de31bba 100644
--- a/src/sim/sim_object.hh
+++ b/src/sim/sim_object.hh
@@ -150,7 +150,7 @@
/**
* @ingroup api_simobject
*/
- SimObject(const Params &_params);
+ SimObject(const Params ¶ms);
virtual ~SimObject();
diff --git a/src/sim/system.cc b/src/sim/system.cc
index bb3c0be..5600542 100644
--- a/src/sim/system.cc
+++ b/src/sim/system.cc
@@ -222,7 +222,6 @@
workItemsEnd(0),
numWorkIds(p.num_work_ids),
thermalModel(p.thermal_model),
- _params(p),
_m5opRange(p.m5ops_base ?
RangeSize(p.m5ops_base, 0x10000) :
AddrRange(1, 0)), // Create an empty range if disabled
diff --git a/src/sim/system.hh b/src/sim/system.hh
index ce77f0a..d3dbc72 100644
--- a/src/sim/system.hh
+++ b/src/sim/system.hh
@@ -382,7 +382,7 @@
ByteOrder
getGuestByteOrder() const
{
- return _params.byte_order;
+ return params().byte_order;
}
/**
@@ -555,12 +555,7 @@
public:
bool breakpoint();
- public:
- typedef SystemParams Params;
-
protected:
- const Params &_params;
-
/**
* Range for memory-mapped m5 pseudo ops. The range will be
* invalid/empty if disabled.
@@ -568,11 +563,11 @@
const AddrRange _m5opRange;
public:
+ PARAMS(System);
+
System(const Params &p);
~System();
- const Params ¶ms() const { return (const Params &)_params; }
-
/**
* Range used by memory-mapped m5 pseudo-ops if enabled. Returns
* an invalid/empty range if disabled.
diff --git a/src/sim/workload.hh b/src/sim/workload.hh
index f7d3b06..cc90f00 100644
--- a/src/sim/workload.hh
+++ b/src/sim/workload.hh
@@ -62,7 +62,7 @@
} stats;
public:
- Workload(const WorkloadParams &_params) : SimObject(_params),
stats(this)
+ Workload(const WorkloadParams ¶ms) : SimObject(params), stats(this)
{}
void recordQuiesce() { stats.instStats.quiesce++; }
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I36308e65df9ba3dafdd3fea3e3897cc3073718b4
Gerrit-Change-Number: 39899
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-MessageType: newchange
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