[gem5-dev] Change in gem5/gem5[develop]: arch-power: Add zero count instructions

[Sandipan Das (Gerrit) via gem5-dev]

Sandipan Das has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/40920 )

Change subject: arch-power: Add zero count instructions
......................................................................

arch-power: Add zero count instructions

This introduces new helpers for finding the count of
leading and trailing zero bits in a given value and adds
the following instructions.
  * Count Trailing Zeros Word (cnttzw[.])
  * Count Leading Zeros Doubleword (cntlzd[.])
  * Count Trailing Zeros Doubleword (cnttzd[.])

Change-Id: I69dad34bc2cffb2ac70ecd3dba7301fa1cdcb340
Signed-off-by: Sandipan Das <sandi...@linux.ibm.com>
---
M src/arch/power/insts/integer.cc
M src/arch/power/insts/integer.hh
M src/arch/power/isa/decoder.isa
3 files changed, 60 insertions(+), 1 deletion(-)



diff --git a/src/arch/power/insts/integer.cc  
b/src/arch/power/insts/integer.cc
index 408ca8e..4c62f37 100644
--- a/src/arch/power/insts/integer.cc
+++ b/src/arch/power/insts/integer.cc
@@ -302,7 +302,10 @@
     } else if (!myMnemonic.compare("extsb") ||
                !myMnemonic.compare("extsh") ||
                !myMnemonic.compare("extsw") ||
-               !myMnemonic.compare("cntlzw")) {
+               !myMnemonic.compare("cntlzw") ||
+               !myMnemonic.compare("cntlzd") ||
+               !myMnemonic.compare("cnttzw") ||
+               !myMnemonic.compare("cnttzd")) {
         printSecondSrc = false;
     }

diff --git a/src/arch/power/insts/integer.hh  
b/src/arch/power/insts/integer.hh
index a3d99ff..1e4ce36 100644
--- a/src/arch/power/insts/integer.hh
+++ b/src/arch/power/insts/integer.hh
@@ -504,6 +504,8 @@
     {
     }

+    /* Compute the number of consecutive zero bits starting from the
+       leftmost bit and moving right in a 32-bit integer */
     inline int
     findLeadingZeros(uint32_t rs) const
     {
@@ -519,6 +521,57 @@
         }
     }

+    /* Compute the number of consecutive zero bits starting from the
+       leftmost bit and moving right in a 64-bit integer */
+    inline int
+    findLeadingZeros(uint64_t rs) const
+    {
+        if (rs) {
+    #if defined(__GNUC__) || (defined(__clang__) && \
+                              __has_builtin(__builtin_clzll))
+            return __builtin_clzll(rs);
+    #else
+            return 63 - findMsbSet(rs);
+    #endif
+        } else {
+            return 64;
+        }
+    }
+
+    /* Compute the number of consecutive zero bits starting from the
+       rightmost bit and moving left in a 32-bit integer */
+    inline int
+    findTrailingZeros(uint32_t rs) const
+    {
+        if (rs) {
+    #if defined(__GNUC__) || (defined(__clang__) && \
+                              __has_builtin(__builtin_ctz))
+            return __builtin_ctz(rs);
+    #else
+            return findLsbSet(rs);
+    #endif
+        } else {
+            return 32;
+        }
+    }
+
+    /* Compute the number of consecutive zero bits starting from the
+       rightmost bit and moving left in a 64-bit integer */
+    inline int
+    findTrailingZeros(uint64_t rs) const
+    {
+        if (rs) {
+    #if defined(__GNUC__) || (defined(__clang__) && \
+                              __has_builtin(__builtin_ctzll))
+            return __builtin_ctzll(rs);
+    #else
+            return findLsbSet(rs);
+    #endif
+        } else {
+            return 64;
+        }
+    }
+
     std::string generateDisassembly(
             Addr pc, const Loader::SymbolTable *symtab) const override;
 };
diff --git a/src/arch/power/isa/decoder.isa b/src/arch/power/isa/decoder.isa
index 6813582..dfad978 100644
--- a/src/arch/power/isa/decoder.isa
+++ b/src/arch/power/isa/decoder.isa
@@ -499,6 +499,9 @@
             922: extsh({{ Ra = Rs_sh; }}, true);
             986: extsw({{ Ra = Rs_sw; }}, true);
             26: cntlzw({{ Ra = findLeadingZeros(Rs_uw); }}, true);
+            58: cntlzd({{ Ra = findLeadingZeros(Rs); }}, true);
+            538: cnttzw({{ Ra = findTrailingZeros(Rs_uw); }}, true);
+            570: cnttzd({{ Ra = findTrailingZeros(Rs); }}, true);

             508: cmpb({{
                 uint64_t mask = 0xff;

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/40920
To unsubscribe, or for help writing mail filters, visit  
https://gem5-review.googlesource.com/settings

Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I69dad34bc2cffb2ac70ecd3dba7301fa1cdcb340
Gerrit-Change-Number: 40920
Gerrit-PatchSet: 1
Gerrit-Owner: Sandipan Das <sandi...@linux.ibm.com>
Gerrit-MessageType: newchange
_______________________________________________
gem5-dev mailing list -- gem5-dev@gem5.org
To unsubscribe send an email to gem5-dev-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s