Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/40956 )
Change subject: cpu,mem: Add or remove parenthesis to make the compiler
happy.
......................................................................
cpu,mem: Add or remove parenthesis to make the compiler happy.
Remove extraneous parenthesis in an if condition, and add some
parenthesis where an assignment was being used as a condition in a while
loop.
Change-Id: Ie12c74ac681ef042138e3b41f257ea1bb2ce4267
---
M src/cpu/o3/inst_queue_impl.hh
M src/cpu/pred/tage_base.cc
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh
index 24871d9..7d81df4 100644
--- a/src/cpu/o3/inst_queue_impl.hh
+++ b/src/cpu/o3/inst_queue_impl.hh
@@ -757,12 +757,12 @@
IssueStruct *i2e_info = issueToExecuteQueue->access(0);
DynInstPtr mem_inst;
- while (mem_inst = std::move(getDeferredMemInstToExecute())) {
+ while ((mem_inst = std::move(getDeferredMemInstToExecute()))) {
addReadyMemInst(mem_inst);
}
// See if any cache blocked instructions are able to be executed
- while (mem_inst = std::move(getBlockedMemInstToExecute())) {
+ while ((mem_inst = std::move(getBlockedMemInstToExecute()))) {
addReadyMemInst(mem_inst);
}
diff --git a/src/cpu/pred/tage_base.cc b/src/cpu/pred/tage_base.cc
index 9a436ae..2349a36 100644
--- a/src/cpu/pred/tage_base.cc
+++ b/src/cpu/pred/tage_base.cc
@@ -467,7 +467,7 @@
//Allocate entries
unsigned numAllocated = 0;
for (int i = X; i <= nHistoryTables; i++) {
- if ((gtable[i][bi->tableIndices[i]].u == 0)) {
+ if (gtable[i][bi->tableIndices[i]].u == 0) {
gtable[i][bi->tableIndices[i]].tag = bi->tableTags[i];
gtable[i][bi->tableIndices[i]].ctr = (taken) ? 0 : -1;
++numAllocated;
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ie12c74ac681ef042138e3b41f257ea1bb2ce4267
Gerrit-Change-Number: 40956
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-MessageType: newchange
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