Hoa Nguyen has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/41013 )
Change subject: cpu,mem: Converting stats to supported units
......................................................................
cpu,mem: Converting stats to supported units
There are several stats having unit being a multiple of supported
units. This change makes the following conversions:
* pJ -> J (Joule)
* mW -> W (Watt)
* MiB/s -> bytes/s
* percentage -> ratio
Change-Id: I9832796e87698daa7f87f91fa39ce40bbf92e737
Signed-off-by: Hoa Nguyen <[email protected]>
---
M src/cpu/o3/fetch_impl.hh
M src/cpu/pred/bpred_unit.cc
M src/cpu/pred/bpred_unit.hh
M src/mem/mem_ctrl.cc
M src/mem/mem_interface.cc
M src/mem/xbar.cc
6 files changed, 77 insertions(+), 77 deletions(-)
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 23ab06b..24e7464 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -193,8 +193,8 @@
"Number of outstanding ITLB misses that were squashed"),
ADD_STAT(nisnDist,
"Number of instructions fetched each cycle (Total)"),
- ADD_STAT(idleRate, "Percent of cycles fetch was idle",
- idleCycles * 100 / cpu->baseStats.numCycles),
+ ADD_STAT(idleRate, "Ratio of cycles fetch was idle",
+ idleCycles / cpu->baseStats.numCycles),
ADD_STAT(branchRate, "Number of branch fetches per cycle",
branches / cpu->baseStats.numCycles),
ADD_STAT(rate, "Number of inst fetches per cycle",
diff --git a/src/cpu/pred/bpred_unit.cc b/src/cpu/pred/bpred_unit.cc
index e618fb5..d32d75b 100644
--- a/src/cpu/pred/bpred_unit.cc
+++ b/src/cpu/pred/bpred_unit.cc
@@ -74,8 +74,7 @@
ADD_STAT(condIncorrect, "Number of conditional branches incorrect"),
ADD_STAT(BTBLookups, "Number of BTB lookups"),
ADD_STAT(BTBHits, "Number of BTB hits"),
- ADD_STAT(BTBHitPct, "BTB Hit Percentage",
- (BTBHits / BTBLookups) * 100),
+ ADD_STAT(BTBHitRatio, "BTB Hit Ratio", BTBHits / BTBLookups),
ADD_STAT(RASUsed, "Number of times the RAS was used to get a
target."),
ADD_STAT(RASIncorrect, "Number of incorrect RAS predictions."),
ADD_STAT(indirectLookups, "Number of indirect predictor lookups."),
@@ -84,7 +83,7 @@
ADD_STAT(indirectMispredicted, "Number of mispredicted indirect"
" branches.")
{
- BTBHitPct.precision(6);
+ BTBHitRatio.precision(6);
}
ProbePoints::PMUUPtr
diff --git a/src/cpu/pred/bpred_unit.hh b/src/cpu/pred/bpred_unit.hh
index e445a39..ca164fa 100644
--- a/src/cpu/pred/bpred_unit.hh
+++ b/src/cpu/pred/bpred_unit.hh
@@ -290,8 +290,8 @@
Stats::Scalar BTBLookups;
/** Stat for number of BTB hits. */
Stats::Scalar BTBHits;
- /** Stat for percent times an entry in BTB found. */
- Stats::Formula BTBHitPct;
+ /** Stat for the ratio between BTB hits and BTB lookups. */
+ Stats::Formula BTBHitRatio;
/** Stat for number of times the RAS is used to get a target. */
Stats::Scalar RASUsed;
/** Stat for number of times the RAS is incorrect. */
diff --git a/src/mem/mem_ctrl.cc b/src/mem/mem_ctrl.cc
index c66d238..717e966 100644
--- a/src/mem/mem_ctrl.cc
+++ b/src/mem/mem_ctrl.cc
@@ -1224,8 +1224,8 @@
ADD_STAT(bytesWrittenSys,
"Total written bytes from the system interface side"),
- ADD_STAT(avgRdBWSys, "Average system read bandwidth in MiByte/s"),
- ADD_STAT(avgWrBWSys, "Average system write bandwidth in MiByte/s"),
+ ADD_STAT(avgRdBWSys, "Average system read bandwidth in Byte/s"),
+ ADD_STAT(avgWrBWSys, "Average system write bandwidth in Byte/s"),
ADD_STAT(totGap, "Total gap between requests"),
ADD_STAT(avgGap, "Average gap between requests"),
@@ -1276,8 +1276,8 @@
.init(ctrl.writeBufferSize)
.flags(nozero);
- avgRdBWSys.precision(2);
- avgWrBWSys.precision(2);
+ avgRdBWSys.precision(8);
+ avgWrBWSys.precision(8);
avgGap.precision(2);
// per-requestor bytes read and written to memory
@@ -1337,8 +1337,8 @@
}
// Formula stats
- avgRdBWSys = (bytesReadSys / 1000000) / simSeconds;
- avgWrBWSys = (bytesWrittenSys / 1000000) / simSeconds;
+ avgRdBWSys = (bytesReadSys) / simSeconds;
+ avgWrBWSys = (bytesWrittenSys) / simSeconds;
avgGap = totGap / (readReqs + writeReqs);
diff --git a/src/mem/mem_interface.cc b/src/mem/mem_interface.cc
index d81d34c..52d601e 100644
--- a/src/mem/mem_interface.cc
+++ b/src/mem/mem_interface.cc
@@ -1786,28 +1786,34 @@
// The energy components inside the power lib are calculated over
// the window so accumulate into the corresponding gem5 stat
- stats.actEnergy += energy.act_energy * dram.devicesPerRank;
- stats.preEnergy += energy.pre_energy * dram.devicesPerRank;
- stats.readEnergy += energy.read_energy * dram.devicesPerRank;
- stats.writeEnergy += energy.write_energy * dram.devicesPerRank;
- stats.refreshEnergy += energy.ref_energy * dram.devicesPerRank;
- stats.actBackEnergy += energy.act_stdby_energy * dram.devicesPerRank;
- stats.preBackEnergy += energy.pre_stdby_energy * dram.devicesPerRank;
- stats.actPowerDownEnergy += energy.f_act_pd_energy *
dram.devicesPerRank;
- stats.prePowerDownEnergy += energy.f_pre_pd_energy *
dram.devicesPerRank;
- stats.selfRefreshEnergy += energy.sref_energy * dram.devicesPerRank;
+ stats.actEnergy += energy.act_energy * dram.devicesPerRank * 1e-12;
+ stats.preEnergy += energy.pre_energy * dram.devicesPerRank * 1e-12;
+ stats.readEnergy += energy.read_energy * dram.devicesPerRank * 1e-12;
+ stats.writeEnergy += energy.write_energy * dram.devicesPerRank * 1e-12;
+ stats.refreshEnergy += energy.ref_energy * dram.devicesPerRank * 1e-12;
+ stats.actBackEnergy += energy.act_stdby_energy * dram.devicesPerRank
+ * 1e-12;
+ stats.preBackEnergy += energy.pre_stdby_energy * dram.devicesPerRank
+ * 1e-12;
+ stats.actPowerDownEnergy += energy.f_act_pd_energy *
dram.devicesPerRank
+ * 1e-12;
+ stats.prePowerDownEnergy += energy.f_pre_pd_energy *
dram.devicesPerRank
+ * 1e-12;
+ stats.selfRefreshEnergy += energy.sref_energy * dram.devicesPerRank
+ * 1e-12;
// Accumulate window energy into the total energy.
- stats.totalEnergy += energy.window_energy * dram.devicesPerRank;
+ stats.totalEnergy += energy.window_energy * dram.devicesPerRank *
1e-12;
+
// Average power must not be accumulated but calculated over the time
- // since last stats reset. SimClock::Frequency is tick period not tick
- // frequency.
- // energy (pJ) 1e-9
- // power (mW) = ----------- * ----------
- // time (tick) tick_frequency
+ // since last stats reset. SimClock::Frequency is an integer
representing
+ // the number of ticks per second, which is the same as
SimClock::Int::s.
+ // energy (J)
+ // power (W) = ----------- x ticks_per_second
+ // time (tick)
stats.averagePower = (stats.totalEnergy.value() /
(curTick() - dram.lastStatsResetTick)) *
- (SimClock::Frequency / 1000000000.0);
+ (SimClock::Int::s);
}
void
@@ -1873,13 +1879,13 @@
ADD_STAT(bytesPerActivate, "Bytes accessed per row activation"),
ADD_STAT(bytesRead, "Total number of bytes read from DRAM"),
ADD_STAT(bytesWritten, "Total number of bytes written to DRAM"),
- ADD_STAT(avgRdBW, "Average DRAM read bandwidth in MiBytes/s"),
- ADD_STAT(avgWrBW, "Average DRAM write bandwidth in MiBytes/s"),
- ADD_STAT(peakBW, "Theoretical peak bandwidth in MiByte/s"),
+ ADD_STAT(avgRdBW, "Average DRAM read bandwidth in Bytes/s"),
+ ADD_STAT(avgWrBW, "Average DRAM write bandwidth in Bytes/s"),
+ ADD_STAT(peakBW, "Theoretical peak bandwidth in Byte/s"),
- ADD_STAT(busUtil, "Data bus utilization in percentage"),
- ADD_STAT(busUtilRead, "Data bus utilization in percentage for reads"),
- ADD_STAT(busUtilWrite, "Data bus utilization in percentage for
writes"),
+ ADD_STAT(busUtil, "Data bus utilization"),
+ ADD_STAT(busUtilRead, "Data bus utilization for reads"),
+ ADD_STAT(busUtilWrite, "Data bus utilization for writes"),
ADD_STAT(pageHitRate, "Row buffer hit rate, read and write combined")
@@ -1906,7 +1912,7 @@
dram.maxAccessesPerRow : dram.rowBufferSize)
.flags(nozero);
- peakBW.precision(2);
+ peakBW.precision(8);
busUtil.precision(2);
busUtilWrite.precision(2);
busUtilRead.precision(2);
@@ -1918,41 +1924,37 @@
avgBusLat = totBusLat / readBursts;
avgMemAccLat = totMemAccLat / readBursts;
- readRowHitRate = (readRowHits / readBursts) * 100;
- writeRowHitRate = (writeRowHits / writeBursts) * 100;
+ readRowHitRate = (readRowHits / readBursts);
+ writeRowHitRate = (writeRowHits / writeBursts);
- avgRdBW = (bytesRead / 1000000) / simSeconds;
- avgWrBW = (bytesWritten / 1000000) / simSeconds;
- peakBW = (SimClock::Frequency / dram.burstDelay()) *
- dram.bytesPerBurst() / 1000000;
+ avgRdBW = bytesRead / simSeconds;
+ avgWrBW = bytesWritten / simSeconds;
+ peakBW = (SimClock::Frequency / dram.burstDelay()) *
dram.bytesPerBurst();
- busUtil = (avgRdBW + avgWrBW) / peakBW * 100;
- busUtilRead = avgRdBW / peakBW * 100;
- busUtilWrite = avgWrBW / peakBW * 100;
+ busUtil = (avgRdBW + avgWrBW) / peakBW;
+ busUtilRead = avgRdBW / peakBW;
+ busUtilWrite = avgWrBW / peakBW;
- pageHitRate = (writeRowHits + readRowHits) /
- (writeBursts + readBursts) * 100;
+ pageHitRate = (writeRowHits + readRowHits) / (writeBursts +
readBursts);
}
DRAMInterface::RankStats::RankStats(DRAMInterface &_dram, Rank &_rank)
: Stats::Group(&_dram, csprintf("rank%d", _rank.rank).c_str()),
rank(_rank),
- ADD_STAT(actEnergy, "Energy for activate commands per rank (pJ)"),
- ADD_STAT(preEnergy, "Energy for precharge commands per rank (pJ)"),
- ADD_STAT(readEnergy, "Energy for read commands per rank (pJ)"),
- ADD_STAT(writeEnergy, "Energy for write commands per rank (pJ)"),
- ADD_STAT(refreshEnergy, "Energy for refresh commands per rank (pJ)"),
- ADD_STAT(actBackEnergy, "Energy for active background per rank (pJ)"),
- ADD_STAT(preBackEnergy, "Energy for precharge background per rank
(pJ)"),
- ADD_STAT(actPowerDownEnergy,
- "Energy for active power-down per rank (pJ)"),
- ADD_STAT(prePowerDownEnergy,
- "Energy for precharge power-down per rank (pJ)"),
- ADD_STAT(selfRefreshEnergy, "Energy for self refresh per rank (pJ)"),
+ ADD_STAT(actEnergy, "Energy for activate commands per rank"),
+ ADD_STAT(preEnergy, "Energy for precharge commands per rank"),
+ ADD_STAT(readEnergy, "Energy for read commands per rank"),
+ ADD_STAT(writeEnergy, "Energy for write commands per rank"),
+ ADD_STAT(refreshEnergy, "Energy for refresh commands per rank"),
+ ADD_STAT(actBackEnergy, "Energy for active background per rank"),
+ ADD_STAT(preBackEnergy, "Energy for precharge background per rank"),
+ ADD_STAT(actPowerDownEnergy, "Energy for active power-down per rank"),
+ ADD_STAT(prePowerDownEnergy, "Energy for precharge power-down per
rank"),
+ ADD_STAT(selfRefreshEnergy, "Energy for self refresh per rank"),
- ADD_STAT(totalEnergy, "Total energy per rank (pJ)"),
- ADD_STAT(averagePower, "Core power per rank (mW)"),
+ ADD_STAT(totalEnergy, "Total energy per rank"),
+ ADD_STAT(averagePower, "Core power per rank"),
ADD_STAT(totalIdleTime, "Total Idle time Per DRAM Rank"),
ADD_STAT(pwrStateTime, "Time in different power states")
@@ -2493,9 +2495,9 @@
ADD_STAT(bytesRead, "Total number of bytes read from DRAM"),
ADD_STAT(bytesWritten, "Total number of bytes written to DRAM"),
- ADD_STAT(avgRdBW, "Average DRAM read bandwidth in MiBytes/s"),
- ADD_STAT(avgWrBW, "Average DRAM write bandwidth in MiBytes/s"),
- ADD_STAT(peakBW, "Theoretical peak bandwidth in MiByte/s"),
+ ADD_STAT(avgRdBW, "Average DRAM read bandwidth in Bytes/s"),
+ ADD_STAT(avgWrBW, "Average DRAM write bandwidth in Bytes/s"),
+ ADD_STAT(peakBW, "Theoretical peak bandwidth in Byte/s"),
ADD_STAT(busUtil, "NVM Data bus utilization in percentage"),
ADD_STAT(busUtilRead, "NVM Data bus read utilization in percentage"),
ADD_STAT(busUtilWrite, "NVM Data bus write utilization in percentage"),
@@ -2523,9 +2525,9 @@
avgBusLat.precision(2);
avgMemAccLat.precision(2);
- avgRdBW.precision(2);
- avgWrBW.precision(2);
- peakBW.precision(2);
+ avgRdBW.precision(8);
+ avgWrBW.precision(8);
+ peakBW.precision(8);
busUtil.precision(2);
busUtilRead.precision(2);
@@ -2547,12 +2549,11 @@
avgBusLat = totBusLat / readBursts;
avgMemAccLat = totMemAccLat / readBursts;
- avgRdBW = (bytesRead / 1000000) / simSeconds;
- avgWrBW = (bytesWritten / 1000000) / simSeconds;
- peakBW = (SimClock::Frequency / nvm.tBURST) *
- nvm.burstSize / 1000000;
+ avgRdBW = bytesRead / simSeconds;
+ avgWrBW = bytesWritten / simSeconds;
+ peakBW = (SimClock::Frequency / nvm.tBURST) * nvm.burstSize;
- busUtil = (avgRdBW + avgWrBW) / peakBW * 100;
- busUtilRead = avgRdBW / peakBW * 100;
- busUtilWrite = avgWrBW / peakBW * 100;
+ busUtil = (avgRdBW + avgWrBW) / peakBW;
+ busUtilRead = avgRdBW / peakBW;
+ busUtilWrite = avgWrBW / peakBW;
}
diff --git a/src/mem/xbar.cc b/src/mem/xbar.cc
index 7423374..6bf4baf 100644
--- a/src/mem/xbar.cc
+++ b/src/mem/xbar.cc
@@ -141,7 +141,7 @@
port(_port), xbar(_xbar), _name(xbar.name() + "." + _name),
state(IDLE),
waitingForPeer(NULL), releaseEvent([this]{ releaseLayer(); }, name()),
ADD_STAT(occupancy, "Layer occupancy (ticks)"),
- ADD_STAT(utilization, "Layer utilization (%)")
+ ADD_STAT(utilization, "Layer utilization")
{
occupancy
.flags(Stats::nozero);
@@ -150,7 +150,7 @@
.precision(1)
.flags(Stats::nozero);
- utilization = 100 * occupancy / simTicks;
+ utilization = occupancy / simTicks;
}
template <typename SrcType, typename DstType>
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/41013
To unsubscribe, or for help writing mail filters, visit
https://gem5-review.googlesource.com/settings
Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I9832796e87698daa7f87f91fa39ce40bbf92e737
Gerrit-Change-Number: 41013
Gerrit-PatchSet: 1
Gerrit-Owner: Hoa Nguyen <[email protected]>
Gerrit-MessageType: newchange
_______________________________________________
gem5-dev mailing list -- [email protected]
To unsubscribe send an email to [email protected]
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
