Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/41740 )
Change subject: arch-power: Pull non-public information out of registers.hh.
......................................................................
arch-power: Pull non-public information out of registers.hh.
Also create a regs/ directory for register related headers.
Change-Id: Id376597b7b6254b26c05aa94e0141abacd807c79
---
M src/arch/power/isa.cc
M src/arch/power/isa.hh
M src/arch/power/isa/includes.isa
M src/arch/power/registers.hh
A src/arch/power/regs/float.hh
A src/arch/power/regs/int.hh
R src/arch/power/regs/misc.hh
M src/arch/power/remote_gdb.hh
M src/arch/power/se_workload.hh
M src/arch/power/utility.cc
10 files changed, 113 insertions(+), 34 deletions(-)
diff --git a/src/arch/power/isa.cc b/src/arch/power/isa.cc
index 0aa480c..8908645 100644
--- a/src/arch/power/isa.cc
+++ b/src/arch/power/isa.cc
@@ -37,8 +37,9 @@
#include "arch/power/isa.hh"
-#include "arch/power/miscregs.hh"
-#include "arch/power/registers.hh"
+#include "arch/power/regs/float.hh"
+#include "arch/power/regs/int.hh"
+#include "arch/power/regs/misc.hh"
#include "params/PowerISA.hh"
namespace PowerISA
diff --git a/src/arch/power/isa.hh b/src/arch/power/isa.hh
index 7ec9ac7..cc5aceb 100644
--- a/src/arch/power/isa.hh
+++ b/src/arch/power/isa.hh
@@ -31,8 +31,7 @@
#define __ARCH_POWER_ISA_HH__
#include "arch/generic/isa.hh"
-#include "arch/power/miscregs.hh"
-#include "arch/power/registers.hh"
+#include "arch/power/regs/misc.hh"
#include "arch/power/types.hh"
#include "base/logging.hh"
#include "cpu/reg_class.hh"
diff --git a/src/arch/power/isa/includes.isa
b/src/arch/power/isa/includes.isa
index c219d97..4aa9ff5 100644
--- a/src/arch/power/isa/includes.isa
+++ b/src/arch/power/isa/includes.isa
@@ -70,7 +70,7 @@
#include "arch/generic/memhelpers.hh"
#include "arch/power/faults.hh"
#include "arch/power/isa_traits.hh"
-#include "arch/power/miscregs.hh"
+#include "arch/power/regs/misc.hh"
#include "arch/power/utility.hh"
#include "base/condcodes.hh"
#include "cpu/base.hh"
diff --git a/src/arch/power/registers.hh b/src/arch/power/registers.hh
index b31f5f3..5bdc058 100644
--- a/src/arch/power/registers.hh
+++ b/src/arch/power/registers.hh
@@ -33,6 +33,7 @@
#include "arch/generic/vec_pred_reg.hh"
#include "arch/generic/vec_reg.hh"
+#include "arch/power/regs/int.hh"
namespace PowerISA
{
@@ -52,35 +53,9 @@
constexpr size_t VecPredRegSizeBits = ::DummyVecPredRegSizeBits;
constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr;
-// Constants Related to the number of registers
-const int NumIntArchRegs = 32;
-
-// CR, XER, LR, CTR, FPSCR, RSV, RSV-LEN, RSV-ADDR
-// and zero register, which doesn't actually exist but needs a number
-const int NumIntSpecialRegs = 9;
-const int NumFloatArchRegs = 32;
-
-const int NumIntRegs = NumIntArchRegs + NumIntSpecialRegs;
-const int NumFloatRegs = NumFloatArchRegs;
-
-// Semantically meaningful register indices
-const int ReturnValueReg = 3;
-const int StackPointerReg = 1;
-
// There isn't one in Power, but we need to define one somewhere
const int ZeroReg = NumIntRegs - 1;
-enum MiscIntRegNums {
- INTREG_CR = NumIntArchRegs,
- INTREG_XER,
- INTREG_LR,
- INTREG_CTR,
- INTREG_FPSCR,
- INTREG_RSV,
- INTREG_RSV_LEN,
- INTREG_RSV_ADDR
-};
-
} // namespace PowerISA
#endif // __ARCH_POWER_REGISTERS_HH__
diff --git a/src/arch/power/regs/float.hh b/src/arch/power/regs/float.hh
new file mode 100644
index 0000000..c6e872d
--- /dev/null
+++ b/src/arch/power/regs/float.hh
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2009 The University of Edinburgh
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __ARCH_POWER_REGS_FLOAT_HH__
+#define __ARCH_POWER_REGS_FLOAT_HH__
+
+namespace PowerISA
+{
+
+const int NumFloatArchRegs = 32;
+const int NumFloatRegs = NumFloatArchRegs;
+
+} // namespace PowerISA
+
+#endif // __ARCH_POWER_REGS_FLOAT_HH__
diff --git a/src/arch/power/regs/int.hh b/src/arch/power/regs/int.hh
new file mode 100644
index 0000000..823b256
--- /dev/null
+++ b/src/arch/power/regs/int.hh
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2009 The University of Edinburgh
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __ARCH_POWER_REGS_INT_HH__
+#define __ARCH_POWER_REGS_INT_HH__
+
+namespace PowerISA
+{
+
+// Constants Related to the number of registers
+const int NumIntArchRegs = 32;
+
+// CR, XER, LR, CTR, FPSCR, RSV, RSV-LEN, RSV-ADDR
+// and zero register, which doesn't actually exist but needs a number
+const int NumIntSpecialRegs = 9;
+
+const int NumIntRegs = NumIntArchRegs + NumIntSpecialRegs;
+
+// Semantically meaningful register indices
+const int ReturnValueReg = 3;
+const int StackPointerReg = 1;
+
+enum MiscIntRegNums {
+ INTREG_CR = NumIntArchRegs,
+ INTREG_XER,
+ INTREG_LR,
+ INTREG_CTR,
+ INTREG_FPSCR,
+ INTREG_RSV,
+ INTREG_RSV_LEN,
+ INTREG_RSV_ADDR
+};
+
+} // namespace PowerISA
+
+#endif // __ARCH_POWER_REGS_INT_HH__
diff --git a/src/arch/power/miscregs.hh b/src/arch/power/regs/misc.hh
similarity index 100%
rename from src/arch/power/miscregs.hh
rename to src/arch/power/regs/misc.hh
diff --git a/src/arch/power/remote_gdb.hh b/src/arch/power/remote_gdb.hh
index 3bb726e..660ddb4 100644
--- a/src/arch/power/remote_gdb.hh
+++ b/src/arch/power/remote_gdb.hh
@@ -32,7 +32,8 @@
#ifndef __ARCH_POWER_REMOTE_GDB_HH__
#define __ARCH_POWER_REMOTE_GDB_HH__
-#include "arch/power/registers.hh"
+#include "arch/power/regs/float.hh"
+#include "arch/power/regs/int.hh"
#include "arch/power/remote_gdb.hh"
#include "base/remote_gdb.hh"
diff --git a/src/arch/power/se_workload.hh b/src/arch/power/se_workload.hh
index 910a271..ac79151 100644
--- a/src/arch/power/se_workload.hh
+++ b/src/arch/power/se_workload.hh
@@ -28,8 +28,8 @@
#ifndef __ARCH_POWER_SE_WORKLOAD_HH__
#define __ARCH_POWER_SE_WORKLOAD_HH__
-#include "arch/power/miscregs.hh"
-#include "arch/power/registers.hh"
+#include "arch/power/regs/int.hh"
+#include "arch/power/regs/misc.hh"
#include "params/PowerSEWorkload.hh"
#include "sim/se_workload.hh"
#include "sim/syscall_abi.hh"
diff --git a/src/arch/power/utility.cc b/src/arch/power/utility.cc
index 1c68cd9..c4111d3 100644
--- a/src/arch/power/utility.cc
+++ b/src/arch/power/utility.cc
@@ -30,6 +30,8 @@
#include "arch/power/utility.hh"
+#include "arch/power/regs/float.hh"
+#include "arch/power/regs/int.hh"
#include "base/logging.hh"
namespace PowerISA {
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Id376597b7b6254b26c05aa94e0141abacd807c79
Gerrit-Change-Number: 41740
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-MessageType: newchange
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