Giacomo Travaglini has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/42073 )
Change subject: arch-arm: Fix atomics permission checks in TLB
......................................................................
arch-arm: Fix atomics permission checks in TLB
For stage 2 translations, atomic accesses were not checking the
access permission bits in the page table descriptors, and were
instead wrongly using the nature of the request itself
(r/w booleans).
Change-Id: I27fbc95f04ea659e77ad5a3afb551873c9c971f0
Signed-off-by: Giacomo Travaglini <[email protected]>
---
M src/arch/arm/tlb.cc
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc
index fd72d25..8e5b3ca 100644
--- a/src/arch/arm/tlb.cc
+++ b/src/arch/arm/tlb.cc
@@ -872,8 +872,7 @@
// sctlr.wxn overrides the xn bit
grant = !wxn && !xn;
} else if (is_atomic) {
- grant = r && w;
- grant_read = r;
+ grant = hap;
} else if (is_write) {
grant = hap & 0x2;
} else { // is_read
--
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Gerrit-Project: public/gem5
Gerrit-Branch: release-staging-v21-0
Gerrit-Change-Id: I27fbc95f04ea659e77ad5a3afb551873c9c971f0
Gerrit-Change-Number: 42073
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini <[email protected]>
Gerrit-MessageType: newchange
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