Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/42686 )
Change subject: arch,cpu: Rename arch/registers.hh to arch/vecregs.hh.
......................................................................
arch,cpu: Rename arch/registers.hh to arch/vecregs.hh.
The only thing still in arch/registers.hh were related to vector
registers. To make it obvious that nothing else should be added, this
change renames the file so that it has the much less generic name
arch/vecregs.hh.
Change-Id: I729697dc576e1978047688d9700dc07ff9b17044
---
M src/arch/SConscript
M src/arch/arm/htm.hh
M src/arch/arm/insts/tme64ruby.cc
M src/arch/arm/interrupts.hh
M src/arch/arm/isa.hh
M src/arch/arm/isa_device.hh
M src/arch/arm/kvm/arm_cpu.cc
M src/arch/arm/linux/se_workload.hh
M src/arch/arm/pmu.hh
M src/arch/arm/remote_gdb.cc
M src/arch/arm/remote_gdb.hh
M src/arch/arm/tracers/tarmac_base.hh
M src/arch/arm/tracers/tarmac_parser.hh
R src/arch/arm/vecregs.hh
R src/arch/mips/vecregs.hh
R src/arch/null/vecregs.hh
R src/arch/power/vecregs.hh
R src/arch/riscv/vecregs.hh
R src/arch/sparc/vecregs.hh
M src/arch/x86/emulenv.hh
M src/arch/x86/isa.cc
M src/arch/x86/isa.hh
M src/arch/x86/isa/includes.isa
M src/arch/x86/linux/se_workload.cc
M src/arch/x86/linux/syscalls.cc
M src/arch/x86/pseudo_inst_abi.hh
R src/arch/x86/vecregs.hh
M src/cpu/exec_context.hh
M src/cpu/kvm/x86_cpu.cc
M src/cpu/minor/dyn_inst.cc
M src/cpu/minor/execute.cc
M src/cpu/minor/scoreboard.cc
M src/cpu/o3/rename_map.cc
M src/cpu/o3/rob.hh
M src/cpu/o3/thread_context_impl.hh
M src/cpu/reg_class.hh
M src/cpu/simple/exec_context.hh
M src/cpu/simple_thread.hh
M src/cpu/static_inst.hh
M src/cpu/thread_context.hh
M src/cpu/trace/trace_cpu.hh
M src/dev/riscv/clint.hh
M src/dev/riscv/plic.cc
M src/sim/process.hh
44 files changed, 34 insertions(+), 56 deletions(-)
diff --git a/src/arch/SConscript b/src/arch/SConscript
index a4825e5..a78277d 100644
--- a/src/arch/SConscript
+++ b/src/arch/SConscript
@@ -61,10 +61,10 @@
isa.hh
isa_traits.hh
locked_mem.hh
- registers.hh
remote_gdb.hh
types.hh
utility.hh
+ vecregs.hh
'''),
env.subst('${TARGET_ISA}'))
diff --git a/src/arch/arm/htm.hh b/src/arch/arm/htm.hh
index 6757622..3f1f60e 100644
--- a/src/arch/arm/htm.hh
+++ b/src/arch/arm/htm.hh
@@ -44,8 +44,8 @@
* ISA-specific types for hardware transactional memory.
*/
-#include "arch/arm/registers.hh"
#include "arch/arm/regs/int.hh"
+#include "arch/arm/regs/vec.hh"
#include "arch/generic/htm.hh"
#include "base/types.hh"
diff --git a/src/arch/arm/insts/tme64ruby.cc
b/src/arch/arm/insts/tme64ruby.cc
index 5e22deb..defc622 100644
--- a/src/arch/arm/insts/tme64ruby.cc
+++ b/src/arch/arm/insts/tme64ruby.cc
@@ -39,7 +39,6 @@
#include "arch/arm/htm.hh"
#include "arch/arm/insts/tme64.hh"
#include "arch/arm/locked_mem.hh"
-#include "arch/arm/registers.hh"
#include "arch/generic/memhelpers.hh"
#include "debug/ArmTme.hh"
#include "mem/packet_access.hh"
diff --git a/src/arch/arm/interrupts.hh b/src/arch/arm/interrupts.hh
index 983c965..f7323db 100644
--- a/src/arch/arm/interrupts.hh
+++ b/src/arch/arm/interrupts.hh
@@ -43,7 +43,6 @@
#include "arch/arm/faults.hh"
#include "arch/arm/isa_traits.hh"
-#include "arch/arm/registers.hh"
#include "arch/arm/regs/misc.hh"
#include "arch/arm/utility.hh"
#include "arch/generic/interrupts.hh"
diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh
index 03854bd..9080f06 100644
--- a/src/arch/arm/isa.hh
+++ b/src/arch/arm/isa.hh
@@ -42,7 +42,7 @@
#define __ARCH_ARM_ISA_HH__
#include "arch/arm/isa_device.hh"
-#include "arch/arm/registers.hh"
+#include "arch/arm/regs/int.hh"
#include "arch/arm/regs/misc.hh"
#include "arch/arm/self_debug.hh"
#include "arch/arm/system.hh"
diff --git a/src/arch/arm/isa_device.hh b/src/arch/arm/isa_device.hh
index 365b3e0..63e6b8e 100644
--- a/src/arch/arm/isa_device.hh
+++ b/src/arch/arm/isa_device.hh
@@ -38,8 +38,8 @@
#ifndef __ARCH_ARM_ISA_DEVICE_HH__
#define __ARCH_ARM_ISA_DEVICE_HH__
-#include "arch/arm/registers.hh"
#include "base/compiler.hh"
+#include "base/types.hh"
class ThreadContext;
diff --git a/src/arch/arm/kvm/arm_cpu.cc b/src/arch/arm/kvm/arm_cpu.cc
index e827c22..31b2ee0 100644
--- a/src/arch/arm/kvm/arm_cpu.cc
+++ b/src/arch/arm/kvm/arm_cpu.cc
@@ -44,7 +44,8 @@
#include <memory>
#include "arch/arm/interrupts.hh"
-#include "arch/arm/registers.hh"
+#include "arch/arm/regs/int.hh"
+#include "arch/arm/regs/misc.hh"
#include "cpu/kvm/base.hh"
#include "debug/Kvm.hh"
#include "debug/KvmContext.hh"
diff --git a/src/arch/arm/linux/se_workload.hh
b/src/arch/arm/linux/se_workload.hh
index 6156661..1c68e20 100644
--- a/src/arch/arm/linux/se_workload.hh
+++ b/src/arch/arm/linux/se_workload.hh
@@ -29,7 +29,7 @@
#define __ARCH_ARM_LINUX_SE_WORKLOAD_HH__
#include "arch/arm/linux/linux.hh"
-#include "arch/arm/registers.hh"
+#include "arch/arm/regs/int.hh"
#include "arch/arm/se_workload.hh"
#include "params/ArmEmuLinux.hh"
#include "sim/syscall_desc.hh"
diff --git a/src/arch/arm/pmu.hh b/src/arch/arm/pmu.hh
index a48a17c..d01f4bb 100644
--- a/src/arch/arm/pmu.hh
+++ b/src/arch/arm/pmu.hh
@@ -43,7 +43,6 @@
#include <vector>
#include "arch/arm/isa_device.hh"
-#include "arch/arm/registers.hh"
#include "arch/arm/system.hh"
#include "base/cprintf.hh"
#include "cpu/base.hh"
diff --git a/src/arch/arm/remote_gdb.cc b/src/arch/arm/remote_gdb.cc
index 96344a9..5a6720c 100644
--- a/src/arch/arm/remote_gdb.cc
+++ b/src/arch/arm/remote_gdb.cc
@@ -137,7 +137,7 @@
#include "arch/arm/decoder.hh"
#include "arch/arm/pagetable.hh"
-#include "arch/arm/registers.hh"
+#include "arch/arm/regs/vec.hh"
#include "arch/arm/system.hh"
#include "arch/arm/utility.hh"
#include "arch/generic/mmu.hh"
diff --git a/src/arch/arm/remote_gdb.hh b/src/arch/arm/remote_gdb.hh
index 8988c20..d55fe59 100644
--- a/src/arch/arm/remote_gdb.hh
+++ b/src/arch/arm/remote_gdb.hh
@@ -46,7 +46,7 @@
#include <algorithm>
-#include "arch/arm/registers.hh"
+#include "arch/arm/regs/vec.hh"
#include "arch/arm/utility.hh"
#include "base/compiler.hh"
#include "base/remote_gdb.hh"
diff --git a/src/arch/arm/tracers/tarmac_base.hh
b/src/arch/arm/tracers/tarmac_base.hh
index 270fbe7..3b62f83 100644
--- a/src/arch/arm/tracers/tarmac_base.hh
+++ b/src/arch/arm/tracers/tarmac_base.hh
@@ -49,7 +49,6 @@
#ifndef __ARCH_ARM_TRACERS_TARMAC_BASE_HH__
#define __ARCH_ARM_TRACERS_TARMAC_BASE_HH__
-#include "arch/arm/registers.hh"
#include "base/trace.hh"
#include "base/types.hh"
#include "cpu/static_inst.hh"
diff --git a/src/arch/arm/tracers/tarmac_parser.hh
b/src/arch/arm/tracers/tarmac_parser.hh
index 3486cb2..000a874 100644
--- a/src/arch/arm/tracers/tarmac_parser.hh
+++ b/src/arch/arm/tracers/tarmac_parser.hh
@@ -49,7 +49,6 @@
#include <fstream>
#include <unordered_map>
-#include "arch/arm/registers.hh"
#include "base/trace.hh"
#include "base/types.hh"
#include "cpu/static_inst.hh"
diff --git a/src/arch/arm/registers.hh b/src/arch/arm/vecregs.hh
similarity index 96%
rename from src/arch/arm/registers.hh
rename to src/arch/arm/vecregs.hh
index 55ba141..9f5621b 100644
--- a/src/arch/arm/registers.hh
+++ b/src/arch/arm/vecregs.hh
@@ -38,8 +38,8 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#ifndef __ARCH_ARM_REGISTERS_HH__
-#define __ARCH_ARM_REGISTERS_HH__
+#ifndef __ARCH_ARM_VECREGS_HH__
+#define __ARCH_ARM_VECREGS_HH__
#include "arch/arm/regs/vec.hh"
diff --git a/src/arch/mips/registers.hh b/src/arch/mips/vecregs.hh
similarity index 96%
rename from src/arch/mips/registers.hh
rename to src/arch/mips/vecregs.hh
index 95801e5..9188052 100644
--- a/src/arch/mips/registers.hh
+++ b/src/arch/mips/vecregs.hh
@@ -27,8 +27,8 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#ifndef __ARCH_MIPS_REGISTERS_HH__
-#define __ARCH_MIPS_REGISTERS_HH__
+#ifndef __ARCH_MIPS_VECREGS_HH__
+#define __ARCH_MIPS_VECREGS_HH__
#include "arch/generic/vec_pred_reg.hh"
#include "arch/generic/vec_reg.hh"
diff --git a/src/arch/null/registers.hh b/src/arch/null/vecregs.hh
similarity index 97%
rename from src/arch/null/registers.hh
rename to src/arch/null/vecregs.hh
index 8aacc56..caa9643 100644
--- a/src/arch/null/registers.hh
+++ b/src/arch/null/vecregs.hh
@@ -35,8 +35,8 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#ifndef __ARCH_NULL_REGISTERS_HH__
-#define __ARCH_NULL_REGISTERS_HH__
+#ifndef __ARCH_NULL_VECREGS_HH__
+#define __ARCH_NULL_VECREGS_HH__
#include "arch/generic/vec_pred_reg.hh"
#include "arch/generic/vec_reg.hh"
diff --git a/src/arch/power/registers.hh b/src/arch/power/vecregs.hh
similarity index 95%
rename from src/arch/power/registers.hh
rename to src/arch/power/vecregs.hh
index d06cae5..d31253a 100644
--- a/src/arch/power/registers.hh
+++ b/src/arch/power/vecregs.hh
@@ -26,8 +26,8 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#ifndef __ARCH_POWER_REGISTERS_HH__
-#define __ARCH_POWER_REGISTERS_HH__
+#ifndef __ARCH_POWER_VECREGS_HH__
+#define __ARCH_POWER_VECREGS_HH__
#include <cstdint>
@@ -54,4 +54,4 @@
} // namespace PowerISA
-#endif // __ARCH_POWER_REGISTERS_HH__
+#endif // __ARCH_POWER_VECREGS_HH__
diff --git a/src/arch/riscv/registers.hh b/src/arch/riscv/vecregs.hh
similarity index 96%
rename from src/arch/riscv/registers.hh
rename to src/arch/riscv/vecregs.hh
index 685e23c..e57cb8b 100644
--- a/src/arch/riscv/registers.hh
+++ b/src/arch/riscv/vecregs.hh
@@ -43,8 +43,8 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#ifndef __ARCH_RISCV_REGISTERS_HH__
-#define __ARCH_RISCV_REGISTERS_HH__
+#ifndef __ARCH_RISCV_VECREGS_HH__
+#define __ARCH_RISCV_VECREGS_HH__
#include <cstdint>
@@ -71,4 +71,4 @@
}
-#endif // __ARCH_RISCV_REGISTERS_HH__
+#endif // __ARCH_RISCV_VECREGS_HH__
diff --git a/src/arch/sparc/registers.hh b/src/arch/sparc/vecregs.hh
similarity index 96%
rename from src/arch/sparc/registers.hh
rename to src/arch/sparc/vecregs.hh
index 077daf9..524f5a1 100644
--- a/src/arch/sparc/registers.hh
+++ b/src/arch/sparc/vecregs.hh
@@ -26,8 +26,8 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#ifndef __ARCH_SPARC_REGISTERS_HH__
-#define __ARCH_SPARC_REGISTERS_HH__
+#ifndef __ARCH_SPARC_VECREGS_HH__
+#define __ARCH_SPARC_VECREGS_HH__
#include "arch/generic/vec_pred_reg.hh"
#include "arch/generic/vec_reg.hh"
diff --git a/src/arch/x86/emulenv.hh b/src/arch/x86/emulenv.hh
index 1490326..cc45cc8 100644
--- a/src/arch/x86/emulenv.hh
+++ b/src/arch/x86/emulenv.hh
@@ -40,7 +40,6 @@
#include "arch/x86/regs/int.hh"
#include "arch/x86/regs/segment.hh"
-#include "arch/x86/registers.hh"
#include "arch/x86/types.hh"
namespace X86ISA
diff --git a/src/arch/x86/isa.cc b/src/arch/x86/isa.cc
index c2fb59d..8cbae5c 100644
--- a/src/arch/x86/isa.cc
+++ b/src/arch/x86/isa.cc
@@ -30,7 +30,6 @@
#include "arch/x86/decoder.hh"
#include "arch/x86/mmu.hh"
-#include "arch/x86/registers.hh"
#include "arch/x86/regs/ccr.hh"
#include "arch/x86/regs/int.hh"
#include "arch/x86/regs/misc.hh"
diff --git a/src/arch/x86/isa.hh b/src/arch/x86/isa.hh
index cc65563..584933d 100644
--- a/src/arch/x86/isa.hh
+++ b/src/arch/x86/isa.hh
@@ -33,7 +33,6 @@
#include <string>
#include "arch/generic/isa.hh"
-#include "arch/x86/registers.hh"
#include "arch/x86/regs/float.hh"
#include "arch/x86/regs/misc.hh"
#include "base/types.hh"
diff --git a/src/arch/x86/isa/includes.isa b/src/arch/x86/isa/includes.isa
index 27ef988..1b9abf3 100644
--- a/src/arch/x86/isa/includes.isa
+++ b/src/arch/x86/isa/includes.isa
@@ -61,7 +61,6 @@
#include "arch/x86/insts/microregop.hh"
#include "arch/x86/insts/static_inst.hh"
#include "arch/x86/isa_traits.hh"
-#include "arch/x86/registers.hh"
#include "arch/x86/types.hh"
#include "arch/x86/utility.hh"
#include "base/logging.hh"
diff --git a/src/arch/x86/linux/se_workload.cc
b/src/arch/x86/linux/se_workload.cc
index 7d2ae5a..ae7aad2 100644
--- a/src/arch/x86/linux/se_workload.cc
+++ b/src/arch/x86/linux/se_workload.cc
@@ -43,7 +43,6 @@
#include "arch/x86/isa_traits.hh"
#include "arch/x86/linux/linux.hh"
#include "arch/x86/process.hh"
-#include "arch/x86/registers.hh"
#include "arch/x86/se_workload.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
diff --git a/src/arch/x86/linux/syscalls.cc b/src/arch/x86/linux/syscalls.cc
index 2431f87..b64e4c7 100644
--- a/src/arch/x86/linux/syscalls.cc
+++ b/src/arch/x86/linux/syscalls.cc
@@ -29,7 +29,6 @@
#include "arch/x86/linux/linux.hh"
#include "arch/x86/process.hh"
-#include "arch/x86/registers.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
#include "kern/linux/linux.hh"
diff --git a/src/arch/x86/pseudo_inst_abi.hh
b/src/arch/x86/pseudo_inst_abi.hh
index 36e40db..04e8428 100644
--- a/src/arch/x86/pseudo_inst_abi.hh
+++ b/src/arch/x86/pseudo_inst_abi.hh
@@ -35,7 +35,7 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include "arch/x86/registers.hh"
+#include "arch/x86/regs/int.hh"
#include "sim/guest_abi.hh"
struct X86PseudoInstABI
diff --git a/src/arch/x86/registers.hh b/src/arch/x86/vecregs.hh
similarity index 96%
rename from src/arch/x86/registers.hh
rename to src/arch/x86/vecregs.hh
index 2ac9c27..a2054d7 100644
--- a/src/arch/x86/registers.hh
+++ b/src/arch/x86/vecregs.hh
@@ -36,8 +36,8 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#ifndef __ARCH_X86_REGISTERS_HH__
-#define __ARCH_X86_REGISTERS_HH__
+#ifndef __ARCH_X86_VECREGS_HH__
+#define __ARCH_X86_VECREGS_HH__
#include "arch/generic/vec_pred_reg.hh"
#include "arch/generic/vec_reg.hh"
@@ -77,4 +77,4 @@
} // namespace X86ISA
-#endif // __ARCH_X86_REGFILE_HH__
+#endif // __ARCH_X86_VECREGS_HH__
diff --git a/src/cpu/exec_context.hh b/src/cpu/exec_context.hh
index 3c40f31..e8164ec 100644
--- a/src/cpu/exec_context.hh
+++ b/src/cpu/exec_context.hh
@@ -42,7 +42,7 @@
#ifndef __CPU_EXEC_CONTEXT_HH__
#define __CPU_EXEC_CONTEXT_HH__
-#include "arch/registers.hh"
+#include "arch/vecregs.hh"
#include "base/types.hh"
#include "config/the_isa.hh"
#include "cpu/base.hh"
diff --git a/src/cpu/kvm/x86_cpu.cc b/src/cpu/kvm/x86_cpu.cc
index 4a7d21b..b1a8a75 100644
--- a/src/cpu/kvm/x86_cpu.cc
+++ b/src/cpu/kvm/x86_cpu.cc
@@ -34,7 +34,6 @@
#include <cerrno>
#include <memory>
-#include "arch/registers.hh"
#include "arch/x86/cpuid.hh"
#include "arch/x86/faults.hh"
#include "arch/x86/interrupts.hh"
diff --git a/src/cpu/minor/dyn_inst.cc b/src/cpu/minor/dyn_inst.cc
index 2cfef31..37908cf 100644
--- a/src/cpu/minor/dyn_inst.cc
+++ b/src/cpu/minor/dyn_inst.cc
@@ -41,7 +41,6 @@
#include <sstream>
#include "arch/isa.hh"
-#include "arch/registers.hh"
#include "cpu/base.hh"
#include "cpu/minor/trace.hh"
#include "cpu/reg_class.hh"
diff --git a/src/cpu/minor/execute.cc b/src/cpu/minor/execute.cc
index 3036ae5..4c9bb51 100644
--- a/src/cpu/minor/execute.cc
+++ b/src/cpu/minor/execute.cc
@@ -38,7 +38,6 @@
#include "cpu/minor/execute.hh"
#include "arch/locked_mem.hh"
-#include "arch/registers.hh"
#include "arch/utility.hh"
#include "cpu/minor/cpu.hh"
#include "cpu/minor/exec_context.hh"
diff --git a/src/cpu/minor/scoreboard.cc b/src/cpu/minor/scoreboard.cc
index 33b6b40..3cc1db7 100644
--- a/src/cpu/minor/scoreboard.cc
+++ b/src/cpu/minor/scoreboard.cc
@@ -37,7 +37,6 @@
#include "cpu/minor/scoreboard.hh"
-#include "arch/registers.hh"
#include "cpu/reg_class.hh"
#include "debug/MinorScoreboard.hh"
#include "debug/MinorTiming.hh"
diff --git a/src/cpu/o3/rename_map.cc b/src/cpu/o3/rename_map.cc
index d42bdee..6640df9 100644
--- a/src/cpu/o3/rename_map.cc
+++ b/src/cpu/o3/rename_map.cc
@@ -43,7 +43,7 @@
#include <vector>
-#include "arch/registers.hh"
+#include "arch/vecregs.hh"
#include "cpu/reg_class.hh"
#include "debug/Rename.hh"
diff --git a/src/cpu/o3/rob.hh b/src/cpu/o3/rob.hh
index 60bcdcf..880796a 100644
--- a/src/cpu/o3/rob.hh
+++ b/src/cpu/o3/rob.hh
@@ -45,9 +45,7 @@
#include <utility>
#include <vector>
-#include "arch/registers.hh"
#include "base/types.hh"
-#include "config/the_isa.hh"
#include "enums/SMTQueuePolicy.hh"
struct DerivO3CPUParams;
diff --git a/src/cpu/o3/thread_context_impl.hh
b/src/cpu/o3/thread_context_impl.hh
index c132530..7d4939f 100644
--- a/src/cpu/o3/thread_context_impl.hh
+++ b/src/cpu/o3/thread_context_impl.hh
@@ -43,7 +43,7 @@
#define __CPU_O3_THREAD_CONTEXT_IMPL_HH__
#include "arch/generic/traits.hh"
-#include "arch/registers.hh"
+#include "arch/vecregs.hh"
#include "config/the_isa.hh"
#include "cpu/o3/thread_context.hh"
#include "debug/O3CPU.hh"
diff --git a/src/cpu/reg_class.hh b/src/cpu/reg_class.hh
index 740f9ee..fb144f3 100644
--- a/src/cpu/reg_class.hh
+++ b/src/cpu/reg_class.hh
@@ -45,7 +45,7 @@
#include <cstddef>
#include "arch/generic/types.hh"
-#include "arch/registers.hh"
+#include "arch/vecregs.hh"
#include "config/the_isa.hh"
/** Enumerate the classes of registers. */
diff --git a/src/cpu/simple/exec_context.hh b/src/cpu/simple/exec_context.hh
index 218f350..114ab90 100644
--- a/src/cpu/simple/exec_context.hh
+++ b/src/cpu/simple/exec_context.hh
@@ -41,7 +41,7 @@
#ifndef __CPU_SIMPLE_EXEC_CONTEXT_HH__
#define __CPU_SIMPLE_EXEC_CONTEXT_HH__
-#include "arch/registers.hh"
+#include "arch/vecregs.hh"
#include "base/types.hh"
#include "config/the_isa.hh"
#include "cpu/base.hh"
diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh
index e192ff1..4ec3b3d 100644
--- a/src/cpu/simple_thread.hh
+++ b/src/cpu/simple_thread.hh
@@ -50,8 +50,8 @@
#include "arch/generic/mmu.hh"
#include "arch/generic/tlb.hh"
#include "arch/isa.hh"
-#include "arch/registers.hh"
#include "arch/types.hh"
+#include "arch/vecregs.hh"
#include "base/types.hh"
#include "config/the_isa.hh"
#include "cpu/thread_context.hh"
diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh
index b2cd508..b0bbaac 100644
--- a/src/cpu/static_inst.hh
+++ b/src/cpu/static_inst.hh
@@ -46,7 +46,6 @@
#include <memory>
#include <string>
-#include "arch/registers.hh"
#include "arch/types.hh"
#include "base/logging.hh"
#include "base/refcnt.hh"
diff --git a/src/cpu/thread_context.hh b/src/cpu/thread_context.hh
index 75f6f5a..145be58 100644
--- a/src/cpu/thread_context.hh
+++ b/src/cpu/thread_context.hh
@@ -47,8 +47,8 @@
#include "arch/generic/htm.hh"
#include "arch/generic/isa.hh"
-#include "arch/registers.hh"
#include "arch/types.hh"
+#include "arch/vecregs.hh"
#include "base/types.hh"
#include "config/the_isa.hh"
#include "cpu/pc_event.hh"
diff --git a/src/cpu/trace/trace_cpu.hh b/src/cpu/trace/trace_cpu.hh
index 790efaf..f2c7678 100644
--- a/src/cpu/trace/trace_cpu.hh
+++ b/src/cpu/trace/trace_cpu.hh
@@ -44,7 +44,6 @@
#include <set>
#include <unordered_map>
-#include "arch/registers.hh"
#include "base/statistics.hh"
#include "cpu/base.hh"
#include "debug/TraceCPUData.hh"
diff --git a/src/dev/riscv/clint.hh b/src/dev/riscv/clint.hh
index 1f213ce..29f9fdc 100644
--- a/src/dev/riscv/clint.hh
+++ b/src/dev/riscv/clint.hh
@@ -39,7 +39,6 @@
#define __DEV_RISCV_CLINT_HH__
#include "arch/riscv/interrupts.hh"
-#include "arch/riscv/registers.hh"
#include "cpu/intr_control.hh"
#include "dev/intpin.hh"
#include "dev/io_device.hh"
diff --git a/src/dev/riscv/plic.cc b/src/dev/riscv/plic.cc
index 60ac192..5792d72 100644
--- a/src/dev/riscv/plic.cc
+++ b/src/dev/riscv/plic.cc
@@ -40,7 +40,6 @@
#include <algorithm>
-#include "arch/riscv/registers.hh"
#include "debug/Plic.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
diff --git a/src/sim/process.hh b/src/sim/process.hh
index c9e6a8b..9dc5f22 100644
--- a/src/sim/process.hh
+++ b/src/sim/process.hh
@@ -37,11 +37,9 @@
#include <string>
#include <vector>
-#include "arch/registers.hh"
#include "base/loader/memory_image.hh"
#include "base/statistics.hh"
#include "base/types.hh"
-#include "config/the_isa.hh"
#include "mem/se_translating_port_proxy.hh"
#include "sim/fd_array.hh"
#include "sim/fd_entry.hh"
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I729697dc576e1978047688d9700dc07ff9b17044
Gerrit-Change-Number: 42686
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-MessageType: newchange
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