Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/41737 )
Change subject: arch-arm: Consolidate register related files into a
directory.
......................................................................
arch-arm: Consolidate register related files into a directory.
Create a directory called "regs" which holds files, primarily headers,
related to registers, with the exception of registers.hh. Hopefully
registers.hh will go away in the not too distant future, removing this
exception.
Change-Id: I631423c2b09bbcd14b20001380270718aeca619e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41737
Reviewed-by: Giacomo Travaglini <[email protected]>
Maintainer: Giacomo Travaglini <[email protected]>
Tested-by: kokoro <[email protected]>
---
M src/arch/arm/SConscript
M src/arch/arm/aapcs32.hh
M src/arch/arm/aapcs64.hh
M src/arch/arm/decoder.hh
M src/arch/arm/fastmodel/iris/interrupts.cc
M src/arch/arm/fastmodel/iris/isa.cc
M src/arch/arm/faults.hh
M src/arch/arm/freebsd/se_workload.hh
M src/arch/arm/htm.cc
M src/arch/arm/htm.hh
M src/arch/arm/insts/fplib.hh
M src/arch/arm/insts/vfp.hh
M src/arch/arm/interrupts.hh
M src/arch/arm/isa.hh
M src/arch/arm/isa/includes.isa
M src/arch/arm/isa_device.cc
M src/arch/arm/isa_device.hh
M src/arch/arm/kvm/armv8_cpu.hh
M src/arch/arm/locked_mem.hh
M src/arch/arm/nativetrace.cc
M src/arch/arm/pmu.hh
M src/arch/arm/process.cc
M src/arch/arm/process.hh
M src/arch/arm/registers.hh
R src/arch/arm/regs/cc.hh
R src/arch/arm/regs/int.hh
R src/arch/arm/regs/misc.cc
R src/arch/arm/regs/misc.hh
R src/arch/arm/regs/misc_types.hh
M src/arch/arm/self_debug.cc
M src/arch/arm/self_debug.hh
M src/arch/arm/semihosting.hh
M src/arch/arm/table_walker.hh
M src/arch/arm/tracers/tarmac_base.cc
M src/arch/arm/tracers/tarmac_record.hh
M src/arch/arm/utility.cc
M src/arch/arm/utility.hh
37 files changed, 58 insertions(+), 56 deletions(-)
Approvals:
Giacomo Travaglini: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/arm/SConscript b/src/arch/arm/SConscript
index 1d6799e..a51d794 100644
--- a/src/arch/arm/SConscript
+++ b/src/arch/arm/SConscript
@@ -81,7 +81,7 @@
Source('freebsd/fs_workload.cc')
Source('freebsd/se_workload.cc')
Source('fs_workload.cc')
- Source('miscregs.cc')
+ Source('regs/misc.cc')
Source('mmu.cc')
Source('nativetrace.cc')
Source('pauth_helpers.cc')
diff --git a/src/arch/arm/aapcs32.hh b/src/arch/arm/aapcs32.hh
index c450237..e1bd505 100644
--- a/src/arch/arm/aapcs32.hh
+++ b/src/arch/arm/aapcs32.hh
@@ -33,7 +33,7 @@
#include <type_traits>
#include <utility>
-#include "arch/arm/intregs.hh"
+#include "arch/arm/regs/int.hh"
#include "arch/arm/utility.hh"
#include "base/intmath.hh"
#include "cpu/thread_context.hh"
diff --git a/src/arch/arm/aapcs64.hh b/src/arch/arm/aapcs64.hh
index ddd5606..3f07105 100644
--- a/src/arch/arm/aapcs64.hh
+++ b/src/arch/arm/aapcs64.hh
@@ -33,7 +33,7 @@
#include <type_traits>
#include <utility>
-#include "arch/arm/intregs.hh"
+#include "arch/arm/regs/int.hh"
#include "arch/arm/utility.hh"
#include "base/intmath.hh"
#include "cpu/thread_context.hh"
diff --git a/src/arch/arm/decoder.hh b/src/arch/arm/decoder.hh
index 53e3f76..a536fe2 100644
--- a/src/arch/arm/decoder.hh
+++ b/src/arch/arm/decoder.hh
@@ -43,7 +43,7 @@
#include <cassert>
-#include "arch/arm/miscregs.hh"
+#include "arch/arm/regs/misc.hh"
#include "arch/arm/types.hh"
#include "arch/generic/decode_cache.hh"
#include "arch/generic/decoder.hh"
diff --git a/src/arch/arm/fastmodel/iris/interrupts.cc
b/src/arch/arm/fastmodel/iris/interrupts.cc
index a3c777d..914f81e 100644
--- a/src/arch/arm/fastmodel/iris/interrupts.cc
+++ b/src/arch/arm/fastmodel/iris/interrupts.cc
@@ -29,8 +29,8 @@
#include "arch/arm/fastmodel/iris/thread_context.hh"
#include "arch/arm/interrupts.hh"
-#include "arch/arm/miscregs.hh"
-#include "arch/arm/miscregs_types.hh"
+#include "arch/arm/regs/misc.hh"
+#include "arch/arm/regs/misc_types.hh"
#include "arch/arm/types.hh"
#include "params/IrisInterrupts.hh"
diff --git a/src/arch/arm/fastmodel/iris/isa.cc
b/src/arch/arm/fastmodel/iris/isa.cc
index 1470434..4aac71f 100644
--- a/src/arch/arm/fastmodel/iris/isa.cc
+++ b/src/arch/arm/fastmodel/iris/isa.cc
@@ -27,7 +27,7 @@
#include "arch/arm/fastmodel/iris/isa.hh"
-#include "arch/arm/miscregs.hh"
+#include "arch/arm/regs/misc.hh"
#include "cpu/thread_context.hh"
#include "params/IrisISA.hh"
#include "sim/serialize.hh"
diff --git a/src/arch/arm/faults.hh b/src/arch/arm/faults.hh
index b911136..463af12 100644
--- a/src/arch/arm/faults.hh
+++ b/src/arch/arm/faults.hh
@@ -42,8 +42,8 @@
#ifndef __ARM_FAULTS_HH__
#define __ARM_FAULTS_HH__
-#include "arch/arm/miscregs.hh"
#include "arch/arm/pagetable.hh"
+#include "arch/arm/regs/misc.hh"
#include "arch/arm/types.hh"
#include "base/logging.hh"
#include "sim/faults.hh"
diff --git a/src/arch/arm/freebsd/se_workload.hh
b/src/arch/arm/freebsd/se_workload.hh
index 6f13201..2f5eb39 100644
--- a/src/arch/arm/freebsd/se_workload.hh
+++ b/src/arch/arm/freebsd/se_workload.hh
@@ -34,8 +34,8 @@
#ifndef __ARCH_ARM_FREEBSD_SE_WORKLOAD_HH__
#define __ARCH_ARM_FREEBSD_SE_WORKLOAD_HH__
-#include "arch/arm/ccregs.hh"
#include "arch/arm/freebsd/freebsd.hh"
+#include "arch/arm/regs/cc.hh"
#include "arch/arm/se_workload.hh"
#include "params/ArmEmuFreebsd.hh"
#include "sim/syscall_desc.hh"
diff --git a/src/arch/arm/htm.cc b/src/arch/arm/htm.cc
index 3129b3f..f977a61 100644
--- a/src/arch/arm/htm.cc
+++ b/src/arch/arm/htm.cc
@@ -37,8 +37,8 @@
#include "arch/arm/htm.hh"
-#include "arch/arm/intregs.hh"
-#include "arch/arm/miscregs.hh"
+#include "arch/arm/regs/int.hh"
+#include "arch/arm/regs/misc.hh"
#include "cpu/thread_context.hh"
void
diff --git a/src/arch/arm/htm.hh b/src/arch/arm/htm.hh
index d32c58e..6757622 100644
--- a/src/arch/arm/htm.hh
+++ b/src/arch/arm/htm.hh
@@ -44,8 +44,8 @@
* ISA-specific types for hardware transactional memory.
*/
-#include "arch/arm/intregs.hh"
#include "arch/arm/registers.hh"
+#include "arch/arm/regs/int.hh"
#include "arch/generic/htm.hh"
#include "base/types.hh"
diff --git a/src/arch/arm/insts/fplib.hh b/src/arch/arm/insts/fplib.hh
index dee857f..512c3d6 100644
--- a/src/arch/arm/insts/fplib.hh
+++ b/src/arch/arm/insts/fplib.hh
@@ -49,7 +49,7 @@
#include <stdint.h>
-#include "arch/arm/miscregs.hh"
+#include "arch/arm/regs/misc.hh"
namespace ArmISA
{
diff --git a/src/arch/arm/insts/vfp.hh b/src/arch/arm/insts/vfp.hh
index e33c68a..7685768 100644
--- a/src/arch/arm/insts/vfp.hh
+++ b/src/arch/arm/insts/vfp.hh
@@ -43,7 +43,7 @@
#include <cmath>
#include "arch/arm/insts/misc.hh"
-#include "arch/arm/miscregs.hh"
+#include "arch/arm/regs/misc.hh"
namespace ArmISA
{
diff --git a/src/arch/arm/interrupts.hh b/src/arch/arm/interrupts.hh
index a86573e..4002f6c 100644
--- a/src/arch/arm/interrupts.hh
+++ b/src/arch/arm/interrupts.hh
@@ -43,8 +43,8 @@
#include "arch/arm/faults.hh"
#include "arch/arm/isa_traits.hh"
-#include "arch/arm/miscregs.hh"
#include "arch/arm/registers.hh"
+#include "arch/arm/regs/misc.hh"
#include "arch/arm/utility.hh"
#include "arch/generic/interrupts.hh"
#include "cpu/thread_context.hh"
diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh
index 646fc25..a0db3ee 100644
--- a/src/arch/arm/isa.hh
+++ b/src/arch/arm/isa.hh
@@ -42,8 +42,8 @@
#define __ARCH_ARM_ISA_HH__
#include "arch/arm/isa_device.hh"
-#include "arch/arm/miscregs.hh"
#include "arch/arm/registers.hh"
+#include "arch/arm/regs/misc.hh"
#include "arch/arm/self_debug.hh"
#include "arch/arm/system.hh"
#include "arch/arm/tlb.hh"
diff --git a/src/arch/arm/isa/includes.isa b/src/arch/arm/isa/includes.isa
index 6af382a..58e6be9 100644
--- a/src/arch/arm/isa/includes.isa
+++ b/src/arch/arm/isa/includes.isa
@@ -86,8 +86,8 @@
#include "arch/arm/decoder.hh"
#include "arch/arm/faults.hh"
#include "arch/arm/insts/sve_macromem.hh"
-#include "arch/arm/intregs.hh"
#include "arch/arm/isa_traits.hh"
+#include "arch/arm/regs/int.hh"
#include "arch/arm/utility.hh"
#include "base/cprintf.hh"
#include "base/loader/symtab.hh"
diff --git a/src/arch/arm/isa_device.cc b/src/arch/arm/isa_device.cc
index 009f0a7..497e74d 100644
--- a/src/arch/arm/isa_device.cc
+++ b/src/arch/arm/isa_device.cc
@@ -37,7 +37,7 @@
#include "arch/arm/isa_device.hh"
-#include "arch/arm/miscregs.hh"
+#include "arch/arm/regs/misc.hh"
#include "base/logging.hh"
namespace ArmISA
diff --git a/src/arch/arm/isa_device.hh b/src/arch/arm/isa_device.hh
index c6e45dd..365b3e0 100644
--- a/src/arch/arm/isa_device.hh
+++ b/src/arch/arm/isa_device.hh
@@ -67,7 +67,7 @@
/**
* Write to a system register belonging to this device.
*
- * @param misc_reg Register number (see miscregs.hh)
+ * @param misc_reg Register number (see regs/misc.hh)
* @param val Value to store
*/
virtual void setMiscReg(int misc_reg, RegVal val) = 0;
@@ -75,7 +75,7 @@
/**
* Read a system register belonging to this device.
*
- * @param misc_reg Register number (see miscregs.hh)
+ * @param misc_reg Register number (see regs/misc.hh)
* @return Register value.
*/
virtual RegVal readMiscReg(int misc_reg) = 0;
diff --git a/src/arch/arm/kvm/armv8_cpu.hh b/src/arch/arm/kvm/armv8_cpu.hh
index 4288808..555d597 100644
--- a/src/arch/arm/kvm/armv8_cpu.hh
+++ b/src/arch/arm/kvm/armv8_cpu.hh
@@ -41,9 +41,9 @@
#include <set>
#include <vector>
-#include "arch/arm/intregs.hh"
#include "arch/arm/kvm/base_cpu.hh"
-#include "arch/arm/miscregs.hh"
+#include "arch/arm/regs/int.hh"
+#include "arch/arm/regs/misc.hh"
struct ArmV8KvmCPUParams;
diff --git a/src/arch/arm/locked_mem.hh b/src/arch/arm/locked_mem.hh
index a01b838..dcf2feb 100644
--- a/src/arch/arm/locked_mem.hh
+++ b/src/arch/arm/locked_mem.hh
@@ -48,8 +48,8 @@
* ISA-specific helper functions for locked memory accesses.
*/
-#include "arch/arm/miscregs.hh"
#include "arch/arm/isa_traits.hh"
+#include "arch/arm/regs/misc.hh"
#include "arch/arm/utility.hh"
#include "debug/LLSC.hh"
#include "mem/packet.hh"
diff --git a/src/arch/arm/nativetrace.cc b/src/arch/arm/nativetrace.cc
index e82f1a8..f7392d1 100644
--- a/src/arch/arm/nativetrace.cc
+++ b/src/arch/arm/nativetrace.cc
@@ -40,9 +40,9 @@
#include "arch/arm/nativetrace.hh"
-#include "arch/arm/ccregs.hh"
#include "arch/arm/isa_traits.hh"
-#include "arch/arm/miscregs.hh"
+#include "arch/arm/regs/cc.hh"
+#include "arch/arm/regs/misc.hh"
#include "cpu/thread_context.hh"
#include "debug/ExecRegDelta.hh"
#include "params/ArmNativeTrace.hh"
diff --git a/src/arch/arm/pmu.hh b/src/arch/arm/pmu.hh
index ed8b2bd..69c64b6 100644
--- a/src/arch/arm/pmu.hh
+++ b/src/arch/arm/pmu.hh
@@ -116,14 +116,14 @@
/**
* Set a register within the PMU.
*
- * @param misc_reg Register number (see miscregs.hh)
+ * @param misc_reg Register number (see regs/misc.hh)
* @param val Value to store
*/
void setMiscReg(int misc_reg, RegVal val) override;
/**
* Read a register within the PMU.
*
- * @param misc_reg Register number (see miscregs.hh)
+ * @param misc_reg Register number (see regs/misc.hh)
* @return Register value.
*/
RegVal readMiscReg(int misc_reg) override;
diff --git a/src/arch/arm/process.cc b/src/arch/arm/process.cc
index 3c09ccb..91df4c9 100644
--- a/src/arch/arm/process.cc
+++ b/src/arch/arm/process.cc
@@ -40,9 +40,9 @@
#include "arch/arm/process.hh"
-#include "arch/arm/ccregs.hh"
#include "arch/arm/isa_traits.hh"
-#include "arch/arm/miscregs.hh"
+#include "arch/arm/regs/cc.hh"
+#include "arch/arm/regs/misc.hh"
#include "arch/arm/types.hh"
#include "base/loader/elf_object.hh"
#include "base/loader/object_file.hh"
diff --git a/src/arch/arm/process.hh b/src/arch/arm/process.hh
index 73eecc4..ff09b6d 100644
--- a/src/arch/arm/process.hh
+++ b/src/arch/arm/process.hh
@@ -44,7 +44,7 @@
#include <string>
#include <vector>
-#include "arch/arm/intregs.hh"
+#include "arch/arm/regs/int.hh"
#include "base/loader/object_file.hh"
#include "mem/page_table.hh"
#include "sim/process.hh"
diff --git a/src/arch/arm/registers.hh b/src/arch/arm/registers.hh
index fdbe625..15a84a5 100644
--- a/src/arch/arm/registers.hh
+++ b/src/arch/arm/registers.hh
@@ -41,7 +41,7 @@
#ifndef __ARCH_ARM_REGISTERS_HH__
#define __ARCH_ARM_REGISTERS_HH__
-#include "arch/arm/intregs.hh"
+#include "arch/arm/regs/int.hh"
#include "arch/generic/vec_pred_reg.hh"
#include "arch/generic/vec_reg.hh"
diff --git a/src/arch/arm/ccregs.hh b/src/arch/arm/regs/cc.hh
similarity index 95%
rename from src/arch/arm/ccregs.hh
rename to src/arch/arm/regs/cc.hh
index 05f8b0c..edcf0db 100644
--- a/src/arch/arm/ccregs.hh
+++ b/src/arch/arm/regs/cc.hh
@@ -35,8 +35,8 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#ifndef __ARCH_ARM_CCREGS_HH__
-#define __ARCH_ARM_CCREGS_HH__
+#ifndef __ARCH_ARM_REGS_CC_HH__
+#define __ARCH_ARM_REGS_CC_HH__
namespace ArmISA
{
@@ -83,4 +83,4 @@
}
-#endif // __ARCH_ARM_CCREGS_HH__
+#endif // __ARCH_ARM_REGS_CC_HH__
diff --git a/src/arch/arm/intregs.hh b/src/arch/arm/regs/int.hh
similarity index 98%
rename from src/arch/arm/intregs.hh
rename to src/arch/arm/regs/int.hh
index 7dd7914..9f3b5fd 100644
--- a/src/arch/arm/intregs.hh
+++ b/src/arch/arm/regs/int.hh
@@ -40,8 +40,8 @@
#include <cassert>
-#ifndef __ARCH_ARM_INTREGS_HH__
-#define __ARCH_ARM_INTREGS_HH__
+#ifndef __ARCH_ARM_REGS_INT_HH__
+#define __ARCH_ARM_REGS_INT_HH__
#include "arch/arm/types.hh"
diff --git a/src/arch/arm/miscregs.cc b/src/arch/arm/regs/misc.cc
similarity index 99%
rename from src/arch/arm/miscregs.cc
rename to src/arch/arm/regs/misc.cc
index 5dfbd48..7b0b616 100644
--- a/src/arch/arm/miscregs.cc
+++ b/src/arch/arm/regs/misc.cc
@@ -35,7 +35,7 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include "arch/arm/miscregs.hh"
+#include "arch/arm/regs/misc.hh"
#include <tuple>
diff --git a/src/arch/arm/miscregs.hh b/src/arch/arm/regs/misc.hh
similarity index 99%
rename from src/arch/arm/miscregs.hh
rename to src/arch/arm/regs/misc.hh
index b2e980d..33d773e 100644
--- a/src/arch/arm/miscregs.hh
+++ b/src/arch/arm/regs/misc.hh
@@ -38,13 +38,13 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#ifndef __ARCH_ARM_MISCREGS_HH__
-#define __ARCH_ARM_MISCREGS_HH__
+#ifndef __ARCH_ARM_REGS_MISC_HH__
+#define __ARCH_ARM_REGS_MISC_HH__
#include <bitset>
#include <tuple>
-#include "arch/arm/miscregs_types.hh"
+#include "arch/arm/regs/misc_types.hh"
#include "base/compiler.hh"
#include "dev/arm/generic_timer_miscregs_types.hh"
@@ -2280,4 +2280,4 @@
}
-#endif // __ARCH_ARM_MISCREGS_HH__
+#endif // __ARCH_ARM_REGS_MISC_HH__
diff --git a/src/arch/arm/miscregs_types.hh
b/src/arch/arm/regs/misc_types.hh
similarity index 98%
rename from src/arch/arm/miscregs_types.hh
rename to src/arch/arm/regs/misc_types.hh
index 7196496..c3fd06e 100644
--- a/src/arch/arm/miscregs_types.hh
+++ b/src/arch/arm/regs/misc_types.hh
@@ -38,8 +38,8 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#ifndef __ARCH_ARM_MISCREGS_TYPES_HH__
-#define __ARCH_ARM_MISCREGS_TYPES_HH__
+#ifndef __ARCH_ARM_REGS_MISC_TYPES_HH__
+#define __ARCH_ARM_REGS_MISC_TYPES_HH__
#include "base/bitunion.hh"
@@ -344,7 +344,8 @@
// (AArch64 SCTLR_EL1 only)
Bitfield<23> span; // Set Priviledge Access Never on taking
// an exception
- Bitfield<23> xp; // Extended page table enable (dropped in
ARMv7)
+ Bitfield<23> xp; // Extended page table enable
+ // (dropped in ARMv7)
Bitfield<22> u; // Alignment (dropped in ARMv7)
Bitfield<21> fi; // Fast interrupts configuration enable
// (ARMv7 only)
@@ -369,7 +370,8 @@
Bitfield<12> i; // Instruction cache enable
Bitfield<11> z; // Branch prediction enable (ARMv7 only)
Bitfield<10> sw; // SWP/SWPB enable (ARMv7 only)
- Bitfield<9, 8> rs; // Deprecated protection bits (dropped in
ARMv7)
+ Bitfield<9, 8> rs; // Deprecated protection bits
+ // (dropped in ARMv7)
Bitfield<9> uma; // User mask access (AArch64 SCTLR_EL1
only)
Bitfield<8> sed; // SETEND disable
// (ARMv8 AArch32 and AArch64 SCTLR_EL1
only)
@@ -785,4 +787,4 @@
}
-#endif // __ARCH_ARM_MISCREGS_TYPES_HH__
+#endif // __ARCH_ARM_REGS_MISC_TYPES_HH__
diff --git a/src/arch/arm/self_debug.cc b/src/arch/arm/self_debug.cc
index 86e4ae5..5b92fb8 100644
--- a/src/arch/arm/self_debug.cc
+++ b/src/arch/arm/self_debug.cc
@@ -38,7 +38,7 @@
#include "arch/arm/self_debug.hh"
#include "arch/arm/faults.hh"
-#include "arch/arm/miscregs_types.hh"
+#include "arch/arm/regs/misc_types.hh"
#include "base/bitfield.hh"
using namespace ArmISA;
diff --git a/src/arch/arm/self_debug.hh b/src/arch/arm/self_debug.hh
index 2ae2f8e..55e74a7 100644
--- a/src/arch/arm/self_debug.hh
+++ b/src/arch/arm/self_debug.hh
@@ -40,7 +40,7 @@
#include "arch/arm/faults.hh"
-#include "arch/arm/miscregs.hh"
+#include "arch/arm/regs/misc.hh"
#include "arch/arm/system.hh"
#include "arch/arm/types.hh"
#include "arch/arm/utility.hh"
diff --git a/src/arch/arm/semihosting.hh b/src/arch/arm/semihosting.hh
index 991b65b..a177360 100644
--- a/src/arch/arm/semihosting.hh
+++ b/src/arch/arm/semihosting.hh
@@ -45,7 +45,7 @@
#include <utility>
#include <vector>
-#include "arch/arm/intregs.hh"
+#include "arch/arm/regs/int.hh"
#include "arch/arm/utility.hh"
#include "cpu/thread_context.hh"
#include "mem/port_proxy.hh"
diff --git a/src/arch/arm/table_walker.hh b/src/arch/arm/table_walker.hh
index 39b6906..16a6f8a 100644
--- a/src/arch/arm/table_walker.hh
+++ b/src/arch/arm/table_walker.hh
@@ -41,7 +41,7 @@
#include <list>
#include "arch/arm/faults.hh"
-#include "arch/arm/miscregs.hh"
+#include "arch/arm/regs/misc.hh"
#include "arch/arm/system.hh"
#include "arch/arm/tlb.hh"
#include "mem/request.hh"
diff --git a/src/arch/arm/tracers/tarmac_base.cc
b/src/arch/arm/tracers/tarmac_base.cc
index 445b151..c05605b 100644
--- a/src/arch/arm/tracers/tarmac_base.cc
+++ b/src/arch/arm/tracers/tarmac_base.cc
@@ -40,7 +40,7 @@
#include <algorithm>
#include <string>
-#include "arch/arm/miscregs.hh"
+#include "arch/arm/regs/misc.hh"
#include "cpu/reg_class.hh"
#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
diff --git a/src/arch/arm/tracers/tarmac_record.hh
b/src/arch/arm/tracers/tarmac_record.hh
index 870a3fd..b02f780 100644
--- a/src/arch/arm/tracers/tarmac_record.hh
+++ b/src/arch/arm/tracers/tarmac_record.hh
@@ -45,7 +45,7 @@
#include <memory>
-#include "arch/arm/miscregs.hh"
+#include "arch/arm/regs/misc.hh"
#include "arch/arm/tracers/tarmac_base.hh"
#include "base/printable.hh"
#include "config/the_isa.hh"
diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc
index 6f63bf2..29e63c4 100644
--- a/src/arch/arm/utility.cc
+++ b/src/arch/arm/utility.cc
@@ -39,12 +39,12 @@
#include <memory>
-#include "arch/arm/ccregs.hh"
#include "arch/arm/faults.hh"
#include "arch/arm/interrupts.hh"
-#include "arch/arm/intregs.hh"
#include "arch/arm/isa_traits.hh"
#include "arch/arm/mmu.hh"
+#include "arch/arm/regs/cc.hh"
+#include "arch/arm/regs/int.hh"
#include "arch/arm/system.hh"
#include "cpu/base.hh"
#include "cpu/checker/cpu.hh"
diff --git a/src/arch/arm/utility.hh b/src/arch/arm/utility.hh
index e919a92..209d7e8 100644
--- a/src/arch/arm/utility.hh
+++ b/src/arch/arm/utility.hh
@@ -42,9 +42,9 @@
#ifndef __ARCH_ARM_UTILITY_HH__
#define __ARCH_ARM_UTILITY_HH__
-#include "arch/arm/ccregs.hh"
#include "arch/arm/isa_traits.hh"
-#include "arch/arm/miscregs.hh"
+#include "arch/arm/regs/cc.hh"
+#include "arch/arm/regs/misc.hh"
#include "arch/arm/types.hh"
#include "base/logging.hh"
#include "base/trace.hh"
7 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the
submitted one.
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I631423c2b09bbcd14b20001380270718aeca619e
Gerrit-Change-Number: 41737
Gerrit-PatchSet: 9
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-Reviewer: Andreas Sandberg <[email protected]>
Gerrit-Reviewer: Gabe Black <[email protected]>
Gerrit-Reviewer: Giacomo Travaglini <[email protected]>
Gerrit-Reviewer: kokoro <[email protected]>
Gerrit-MessageType: merged
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