See <https://jenkins.gem5.org/job/Weekly/14/display/redirect?page=changes>
Changes:
[Bobby R. Bruce] scons: Fixing build errors with scons 4.0.1 and 4.1.0
[Bobby R. Bruce] misc: Updated the RELEASE-NOTES and version number
[petery.hin] arch-riscv: Fixing RISC-V remote GDB MIP and MIE accesses.
[Bobby R. Bruce] base-stats,python: Add missing "group" in `_prepare_stats`
[gabe.black] systemc: Stop using std::gets in systemc.h.
[gabe.black] scons,tlm: Update the gem5-within-systemc SConstruct to use c++14.
[gabe.black] systemc,util: Update sc_master_port.cc now that params() returns a
ref.
[gabe.black] systemc,util: Fix a bad port of a change from gem5 proper to here.
[gabe.black] scons,util: Make the tlm SConstruct put SConsign in the build dir.
[gabe.black] sim,systemc: Use slightly non-standard constructors for custom
create()
[gabe.black] cpu: Delete unnecessary create() methods.
[gabe.black] scons,python: Always generate default create() methods.
[Andrea.Mondelli] arch-riscv: Fixed CPU switching and PLIC issue with MinorCPU
[Giacomo Travaglini] configs: Remove icache from HTMSequencer
[Giacomo Travaglini] dev-arm: Fix SMMUv3BaseCache Stats
[Giacomo Travaglini] dev-arm: Fix WalkCache stats
[Giacomo Travaglini] dev-arm: Remove unused SMMUv3 WalkCache variables
[Giacomo Travaglini] configs: Use integer division in MESI_Three_Level_HTM.py
[tiago.muck] scons,mem-ruby: export need_partial_func_reads in SConstruct
[tiago.muck] configs,mem-ruby: CHI-based Ruby protocol
[odanrc] base-stats: Fix Watt Unit
[Bobby R. Bruce] python: Fix incorrect prefixes is m5.utils.convert
[Bobby R. Bruce] arch-arm: Fix atomics permission checks in TLB
[Bobby R. Bruce] configs: Use integer division in MESI_Three_Level_HTM.py
[Bobby R. Bruce] misc: Updated the RELEASE-NOTES and version number
[Giacomo Travaglini] configs, mem: MemInterface generating its own controller
[odanrc] misc: Fix coding style for class-opening braces
[odanrc] util: Add verifier for opening braces of classes
[odanrc] misc: Fix coding style for struct's opening braces
[Giacomo Travaglini] configs: Remove simpleSystem factory function
[odanrc] util: Add verifier for opening braces of structs
[gabe.black] mem: Fix style in addr_mapper.hh.
[gabe.black] arch,cpu: Collapse away TheISA::advancePC.
[gabe.black] arch,cpu: Move TheISA::copyRegs to TheISA::ISA::copyRegsFrom.
[gabe.black] arch,cpu,kern,sim: Eliminate the utility.hh switching header.
[odanrc] misc: Fix coding style for enum's opening braces
[odanrc] util: Add verifier for opening braces of enums
[odanrc] misc: Fix coding style for union's opening braces
[odanrc] base-stats: Add unit test for Stats::Units
[odanrc] base-stats: Make Rate's compilation smarter
[odanrc] util: Add verifier for opening braces of unions
[daecheol.you] mem-garnet: Added packet distribution stats
[gabe.black] arch-arm: Consolidate register related files into a directory.
[gabe.black] arch: Eliminate the GuestByteOrder constant.
[Giacomo Travaglini] configs: Add a BaseSimpleSystem
[Giacomo Travaglini] configs, tests: Ruby.create_system cpus option
[Giacomo Travaglini] configs: RubySimpleSystem and simple ruby_fs.py script
[mattdsinclair] dev-hsa: Fix size of HSA Queue
[yazakram] arch-riscv,util: fix the default cross compiler for riscv
[mattdsinclair] gpu-compute: Support dynamic scratch allocations
[mattdsinclair] gpu-compute: Remove unused functions
[odanrc] dev-hsa: Fix includes
------------------------------------------
[...truncated 943.76 KB...]
[ SHCC] softfloat/f64_mulAdd.c -> .os
[ SHCC] softfloat/f64_mul.c -> .os
[ SHCC] softfloat/f64_rem.c -> .os
[ SHCC] softfloat/f64_roundToInt.c -> .os
[ SHCC] softfloat/f64_sqrt.c -> .os
[ SHCC] softfloat/f64_sub.c -> .os
[ SHCC] softfloat/f64_to_f128.c -> .os
[ SHCC] softfloat/f64_to_f16.c -> .os
[ SHCC] softfloat/f64_to_f32.c -> .os
[ SHCC] softfloat/f64_to_i32.c -> .os
[ SHCC] softfloat/f64_to_i32_r_minMag.c -> .os
[ SHCC] softfloat/f64_to_i64.c -> .os
[ SHCC] softfloat/f64_to_i64_r_minMag.c -> .os
[ SHCC] softfloat/f64_to_ui32.c -> .os
[ SHCC] softfloat/f64_to_ui32_r_minMag.c -> .os
[ SHCC] softfloat/f64_to_ui64.c -> .os
[ SHCC] softfloat/f64_to_ui64_r_minMag.c -> .os
[ SHCC] softfloat/i32_to_f128.c -> .os
[ SHCC] softfloat/i32_to_f16.c -> .os
[ SHCC] softfloat/i32_to_f32.c -> .os
[ SHCC] softfloat/i32_to_f64.c -> .os
[ SHCC] softfloat/i64_to_f128.c -> .os
[ SHCC] softfloat/i64_to_f16.c -> .os
[ SHCC] softfloat/i64_to_f32.c -> .os
[ SHCC] softfloat/i64_to_f64.c -> .os
[ SHCC] softfloat/s_add128.c -> .os
[ SHCC] softfloat/s_add256M.c -> .os
[ SHCC] softfloat/s_addCarryM.c -> .os
[ SHCC] softfloat/s_addComplCarryM.c -> .os
[ SHCC] softfloat/s_addMagsF128.c -> .os
[ SHCC] softfloat/s_addMagsF16.c -> .os
[ SHCC] softfloat/s_addMagsF32.c -> .os
[ SHCC] softfloat/s_addMagsF64.c -> .os
[ SHCC] softfloat/s_addM.c -> .os
[ SHCC] softfloat/s_approxRecip_1Ks.c -> .os
[ SHCC] softfloat/s_approxRecip32_1.c -> .os
[ SHCC] softfloat/s_approxRecipSqrt_1Ks.c -> .os
[ SHCC] softfloat/s_approxRecipSqrt32_1.c -> .os
[ SHCC] softfloat/s_commonNaNToF128UI.c -> .os
[ SHCC] softfloat/s_commonNaNToF16UI.c -> .os
[ SHCC] softfloat/s_commonNaNToF32UI.c -> .os
[ SHCC] softfloat/s_commonNaNToF64UI.c -> .os
[ SHCC] softfloat/s_compare128M.c -> .os
[ SHCC] softfloat/s_compare96M.c -> .os
[ SHCC] softfloat/s_countLeadingZeros16.c -> .os
[ SHCC] softfloat/s_countLeadingZeros32.c -> .os
[ SHCC] softfloat/s_countLeadingZeros64.c -> .os
[ SHCC] softfloat/s_countLeadingZeros8.c -> .os
[ SHCC] softfloat/s_eq128.c -> .os
[ SHCC] softfloat/s_f128UIToCommonNaN.c -> .os
[ SHCC] softfloat/s_f16UIToCommonNaN.c -> .os
[ SHCC] softfloat/s_f32UIToCommonNaN.c -> .os
[ SHCC] softfloat/s_f64UIToCommonNaN.c -> .os
[ SHCC] softfloat/s_le128.c -> .os
[ SHCC] softfloat/s_lt128.c -> .os
[ SHCC] softfloat/s_mul128By32.c -> .os
[ SHCC] softfloat/s_mul128MTo256M.c -> .os
[ SHCC] softfloat/s_mul128To256M.c -> .os
[ SHCC] softfloat/s_mul64ByShifted32To128.c -> .os
[ SHCC] softfloat/s_mul64To128.c -> .os
[ SHCC] softfloat/s_mul64To128M.c -> .os
[ SHCC] softfloat/s_mulAddF128.c -> .os
[ SHCC] softfloat/s_mulAddF16.c -> .os
[ SHCC] softfloat/s_mulAddF32.c -> .os
[ SHCC] softfloat/s_mulAddF64.c -> .os
[ SHCC] softfloat/s_negXM.c -> .os
[ SHCC] softfloat/s_normRoundPackToF128.c -> .os
[ SHCC] softfloat/s_normRoundPackToF16.c -> .os
[ SHCC] softfloat/s_normRoundPackToF32.c -> .os
[ SHCC] softfloat/s_normRoundPackToF64.c -> .os
[ SHCC] softfloat/s_normSubnormalF128Sig.c -> .os
[ SHCC] softfloat/s_normSubnormalF16Sig.c -> .os
[ SHCC] softfloat/s_normSubnormalF32Sig.c -> .os
[ SHCC] softfloat/s_normSubnormalF64Sig.c -> .os
[ SHCC] softfloat/softfloat_raiseFlags.c -> .os
[ SHCC] softfloat/softfloat_state.c -> .os
[ SHCC] softfloat/s_propagateNaNF128UI.c -> .os
[ SHCC] softfloat/s_propagateNaNF16UI.c -> .os
[ SHCC] softfloat/s_propagateNaNF32UI.c -> .os
[ SHCC] softfloat/s_propagateNaNF64UI.c -> .os
[ SHCC] softfloat/s_remStepMBy32.c -> .os
[ SHCC] softfloat/s_roundMToI64.c -> .os
[ SHCC] softfloat/s_roundMToUI64.c -> .os
[ SHCC] softfloat/s_roundPackMToI64.c -> .os
[ SHCC] softfloat/s_roundPackMToUI64.c -> .os
[ SHCC] softfloat/s_roundPackToF128.c -> .os
[ SHCC] softfloat/s_roundPackToF16.c -> .os
[ SHCC] softfloat/s_roundPackToF32.c -> .os
[ SHCC] softfloat/s_roundPackToF64.c -> .os
[ SHCC] softfloat/s_roundPackToI32.c -> .os
[ SHCC] softfloat/s_roundPackToI64.c -> .os
[ SHCC] softfloat/s_roundPackToUI32.c -> .os
[ SHCC] softfloat/s_roundPackToUI64.c -> .os
[ SHCC] softfloat/s_roundToI32.c -> .os
[ SHCC] softfloat/s_roundToI64.c -> .os
[ SHCC] softfloat/s_roundToUI32.c -> .os
[ SHCC] softfloat/s_roundToUI64.c -> .os
[ SHCC] softfloat/s_shiftRightJam128.c -> .os
[ SHCC] softfloat/s_shiftRightJam128Extra.c -> .os
[ SHCC] softfloat/s_shiftRightJam256M.c -> .os
[ SHCC] softfloat/s_shiftRightJam32.c -> .os
[ SHCC] softfloat/s_shiftRightJam64.c -> .os
[ SHCC] softfloat/s_shiftRightJam64Extra.c -> .os
[ SHCC] softfloat/s_shortShiftLeft128.c -> .os
[ SHCC] softfloat/s_shortShiftLeft64To96M.c -> .os
[ SHCC] softfloat/s_shortShiftRight128.c -> .os
[ SHCC] softfloat/s_shortShiftRightExtendM.c -> .os
[ SHCC] softfloat/s_shortShiftRightJam128.c -> .os
[ SHCC] softfloat/s_shortShiftRightJam128Extra.c -> .os
[ SHCC] softfloat/s_shortShiftRightJam64.c -> .os
[ SHCC] softfloat/s_shortShiftRightJam64Extra.c -> .os
[ SHCC] softfloat/s_shortShiftRightM.c -> .os
[ SHCC] softfloat/s_sub128.c -> .os
[ SHCC] softfloat/s_sub1XM.c -> .os
[ SHCC] softfloat/s_sub256M.c -> .os
[ SHCC] softfloat/s_subMagsF128.c -> .os
[ SHCC] softfloat/s_subMagsF16.c -> .os
[ SHCC] softfloat/s_subMagsF32.c -> .os
[ SHCC] softfloat/s_subMagsF64.c -> .os
[ SHCC] softfloat/s_subM.c -> .os
[ SHCC] softfloat/ui32_to_f128.c -> .os
[ SHCC] softfloat/ui32_to_f16.c -> .os
[ SHCC] softfloat/ui32_to_f32.c -> .os
[ SHCC] softfloat/ui32_to_f64.c -> .os
[ SHCC] softfloat/ui64_to_f128.c -> .os
[ SHCC] softfloat/ui64_to_f16.c -> .os
[ SHCC] softfloat/ui64_to_f32.c -> .os
[ SHCC] softfloat/ui64_to_f64.c -> .os
[ AR] -> softfloat/libsoftfloat.a
[ RANLIB] -> softfloat/libsoftfloat.a
[ LINK] -> GCN3_X86/gem5.opt
/usr/include/net/if.h:136:7: warning: type 'union <anon>' violates one
definition rule [-Wodr]
{
^
/usr/include/linux/if.h:233:8: note: a different type is defined in another
translation unit
union {
^
/usr/include/net/if.h:148:12: note: the first difference of corresponding
definitions is field 'ifru_data'
__caddr_t ifru_data;
^
/usr/include/linux/if.h:245:10: note: a field of same name but different type
is defined in another translation unit
void * ifru_data;
^
<built-in>: note: type 'char' should match type 'void'
/usr/include/net/if.h:126:8: warning: type 'struct ifreq' violates one
definition rule [-Wodr]
struct ifreq
^
/usr/include/linux/if.h:226:8: note: a different type is defined in another
translation unit
struct ifreq {
^
/usr/include/net/if.h:149:9: note: the first difference of corresponding
definitions is field 'ifr_ifru'
} ifr_ifru;
^
/usr/include/linux/if.h:247:4: note: a field of same name but different type is
defined in another translation unit
} ifr_ifru;
^
/usr/include/net/if.h:136:7: note: type 'union <anon>' should match type 'union
<anon>' that itself violate one definition rule
{
^
/usr/include/linux/if.h:233:8: note: the incompatible type is defined here
union {
^
scons: done building targets.
*** Summary of Warnings ***
Warning: Can't enable object file debug section compression
Warning: Can't enable executable debug section compression
Warning: Couldn't find any HDF5 C++ libraries. Disabling HDF5 support.
+ wget -qN http://dist.gem5.org/dist/develop/test-progs/square/square.o
+ mkdir -p tests/testing-results
+ pwd
+ pwd
+ pwd
+ docker run -u : --volume
<https://jenkins.gem5.org/job/Weekly/ws/>:<https://jenkins.gem5.org/job/Weekly/ws/>
-w <https://jenkins.gem5.org/job/Weekly/ws/> gcr.io/gem5-test/gcn-gpu:latest
build/GCN3_X86/gem5.opt configs/example/apu_se.py -n2 -c square.o
warn: ldsBus.slave is deprecated. `slave` is now called `cpu_side_port`
warn: ldsBus.master is deprecated. `master` is now called `mem_side_port`
warn: ldsBus.slave is deprecated. `slave` is now called `cpu_side_port`
warn: ldsBus.master is deprecated. `master` is now called `mem_side_port`
warn: ldsBus.slave is deprecated. `slave` is now called `cpu_side_port`
warn: ldsBus.master is deprecated. `master` is now called `mem_side_port`
warn: ldsBus.slave is deprecated. `slave` is now called `cpu_side_port`
warn: ldsBus.master is deprecated. `master` is now called `mem_side_port`
warn: sqc_tlb.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: sqc_coalescer.master is deprecated. `master` is now called
`mem_side_ports`
warn: scalar_tlb.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: scalar_coalescer.master is deprecated. `master` is now called
`mem_side_ports`
warn: l1_tlb0.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: l1_coalescer0.master is deprecated. `master` is now called
`mem_side_ports`
warn: l1_tlb1.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: l1_coalescer1.master is deprecated. `master` is now called
`mem_side_ports`
warn: l1_tlb2.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: l1_coalescer2.master is deprecated. `master` is now called
`mem_side_ports`
warn: l1_tlb3.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: l1_coalescer3.master is deprecated. `master` is now called
`mem_side_ports`
warn: l2_tlb.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: l2_coalescer.master is deprecated. `master` is now called `mem_side_ports`
warn: l3_tlb.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: l3_coalescer.master is deprecated. `master` is now called `mem_side_ports`
warn: sqc_coalescer.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: sqc_coalescer.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: sqc_coalescer.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: sqc_coalescer.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: scalar_coalescer.slave is deprecated. `slave` is now called
`cpu_side_ports`
warn: scalar_coalescer.slave is deprecated. `slave` is now called
`cpu_side_ports`
warn: scalar_coalescer.slave is deprecated. `slave` is now called
`cpu_side_ports`
warn: scalar_coalescer.slave is deprecated. `slave` is now called
`cpu_side_ports`
warn: l1_coalescer0.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: l1_coalescer1.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: l1_coalescer2.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: l1_coalescer3.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: l2_coalescer.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: sqc_tlb.master is deprecated. `master` is now called `mem_side_ports`
warn: l2_coalescer.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: scalar_tlb.master is deprecated. `master` is now called `mem_side_ports`
warn: l2_coalescer.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: l1_tlb0.master is deprecated. `master` is now called `mem_side_ports`
warn: l2_coalescer.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: l1_tlb1.master is deprecated. `master` is now called `mem_side_ports`
warn: l2_coalescer.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: l1_tlb2.master is deprecated. `master` is now called `mem_side_ports`
warn: l2_coalescer.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: l1_tlb3.master is deprecated. `master` is now called `mem_side_ports`
warn: l3_coalescer.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: l2_tlb.master is deprecated. `master` is now called `mem_side_ports`
Traceback (most recent call last):
File "<string>", line 1, in <module>
File "build/GCN3_X86/python/m5/main.py", line 455, in main
exec(filecode, scope)
File "configs/example/apu_se.py", line 529, in <module>
Ruby.create_system(options, None, system, None, dma_list, None)
File "<https://jenkins.gem5.org/job/Weekly/ws/configs/ruby/Ruby.py";,> line
195, in create_system
eval("%s.create_system(options, full_system, system, dma_ports,\
File "<string>", line 1, in <module>
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 version [DEVELOP-FOR-V20.2]
gem5 compiled Mar 26 2021 10:07:11
gem5 started Mar 26 2021 10:16:59
gem5 executing on 50bf5e60e235, pid 1
command line: build/GCN3_X86/gem5.opt configs/example/apu_se.py -n2 -c square.o
info: Standard input is not a terminal, disabling listeners.
Num SQC = 1 Num scalar caches = 1 Num CU = 4
Error: could not create sytem for ruby protocol GPU_VIPER
TypeError: create_system() takes 6 positional arguments but 7 were given
Build step 'Execute shell' marked build as failure
Archiving artifacts
Recording test results
[Checks API] No suitable checks publisher found.
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