[gem5-dev] Change in gem5/gem5[develop]: cpu: Simplify the RegId class a little.

[Gabe Black (Gerrit) via gem5-dev]

Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/42684 )

Change subject: cpu: Simplify the RegId class a little.
......................................................................
cpu: Simplify the RegId class a little.

Having const and non const reference accessors for the RegId index are
basically the same thing as just making the index value public but with
more complexity. Stop allowing updates through the accessor, and
simplify/fix the one location that was using that.

Also, there is no good reason to return an integer value by const
reference instead of returning it by value, since the value being passed
around (a pointer) is the same size, and just makes the value harder to
access.

Change-Id: I377ffc5878ef9bffa2ac53626a87c019a585ab1a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42684
Reviewed-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Tested-by: kokoro <noreply+kok...@google.com>
---
M src/cpu/o3/cpu.cc
M src/cpu/reg_class.hh
2 files changed, 10 insertions(+), 17 deletions(-)

Approvals:
  Giacomo Travaglini: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index 04a9ee7..6b1ebee 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -773,29 +773,23 @@
     //Bind Int Regs to Rename Map
     const auto &regClasses = isa[tid]->regClasses();

-    for (RegId reg_id(IntRegClass, 0);
-            reg_id.index() < regClasses.at(IntRegClass).size();
-            reg_id.index()++) {
+    for (RegIndex idx = 0; idx < regClasses.at(IntRegClass).size(); idx++)  
{
         PhysRegIdPtr phys_reg = freeList.getIntReg();
-        renameMap[tid].setEntry(reg_id, phys_reg);
+        renameMap[tid].setEntry(RegId(IntRegClass, idx), phys_reg);
         scoreboard.setReg(phys_reg);
     }

     //Bind Float Regs to Rename Map
-    for (RegId reg_id(FloatRegClass, 0);
-            reg_id.index() < regClasses.at(FloatRegClass).size();
-            reg_id.index()++) {
+    for (RegIndex idx = 0; idx < regClasses.at(FloatRegClass).size();  
idx++) {
         PhysRegIdPtr phys_reg = freeList.getFloatReg();
-        renameMap[tid].setEntry(reg_id, phys_reg);
+        renameMap[tid].setEntry(RegId(FloatRegClass, idx), phys_reg);
         scoreboard.setReg(phys_reg);
     }

     //Bind condition-code Regs to Rename Map
-    for (RegId reg_id(CCRegClass, 0);
-            reg_id.index() < regClasses.at(CCRegClass).size();
-            reg_id.index()++) {
+    for (RegIndex idx = 0; idx < regClasses.at(CCRegClass).size(); idx++) {
         PhysRegIdPtr phys_reg = freeList.getCCReg();
-        renameMap[tid].setEntry(reg_id, phys_reg);
+        renameMap[tid].setEntry(RegId(CCRegClass, idx), phys_reg);
         scoreboard.setReg(phys_reg);
     }

diff --git a/src/cpu/reg_class.hh b/src/cpu/reg_class.hh
index 84b513c..37207a2 100644
--- a/src/cpu/reg_class.hh
+++ b/src/cpu/reg_class.hh
@@ -168,13 +168,12 @@

     /** Index accessors */
     /** @{ */
-    const RegIndex& index() const { return regIdx; }
-    RegIndex& index() { return regIdx; }
+    RegIndex index() const { return regIdx; }

     /** Index flattening.
      * Required to be able to use a vector for the register mapping.
      */
-    inline RegIndex
+    RegIndex
     flatIndex() const
     {
         switch (regClass) {
@@ -194,9 +193,9 @@
     /** @} */

     /** Elem accessor */
-    const RegIndex& elemIndex() const { return elemIdx; }
+    RegIndex elemIndex() const { return elemIdx; }
     /** Class accessor */
-    const RegClass& classValue() const { return regClass; }
+    RegClass classValue() const { return regClass; }
     /** Return a const char* with the register class name. */
     const char* className() const { return regClassStrings[regClass]; }




10 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the  
submitted one.
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I377ffc5878ef9bffa2ac53626a87c019a585ab1a
Gerrit-Change-Number: 42684
Gerrit-PatchSet: 12
Gerrit-Owner: Gabe Black <gabe.bl...@gmail.com>
Gerrit-Reviewer: Gabe Black <gabe.bl...@gmail.com>
Gerrit-Reviewer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Jason Lowe-Power <ja...@lowepower.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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