Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/42003 )
Change subject: arch: Delete a few unused vector register types/constants.
......................................................................
arch: Delete a few unused vector register types/constants.
These are used internally in ARM, but dummy versions of them were being
published by all ISAs even though nobody was consuming them.
Change-Id: I93d9e53c503e375a2f901bb6f7f4c00a7cdadb20
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42003
Reviewed-by: Gabe Black <[email protected]>
Maintainer: Gabe Black <[email protected]>
Tested-by: kokoro <[email protected]>
---
M src/arch/arm/regs/vec.hh
M src/arch/arm/types.hh
M src/arch/generic/vec_pred_reg.hh
M src/arch/generic/vec_reg.hh
M src/arch/mips/vecregs.hh
M src/arch/null/vecregs.hh
M src/arch/power/vecregs.hh
M src/arch/riscv/vecregs.hh
M src/arch/sparc/vecregs.hh
M src/arch/x86/vecregs.hh
10 files changed, 6 insertions(+), 44 deletions(-)
Approvals:
Gabe Black: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/arm/regs/vec.hh b/src/arch/arm/regs/vec.hh
index a209e52..3bcc390 100644
--- a/src/arch/arm/regs/vec.hh
+++ b/src/arch/arm/regs/vec.hh
@@ -59,9 +59,9 @@
::VecRegContainer<NumVecElemPerVecReg * sizeof(VecElem)>;
using VecPredReg = ::VecPredRegT<VecElem, NumVecElemPerVecReg,
- VecPredRegHasPackedRepr, false>;
+ false, false>;
using ConstVecPredReg = ::VecPredRegT<VecElem, NumVecElemPerVecReg,
- VecPredRegHasPackedRepr, true>;
+ false, true>;
using VecPredRegContainer = VecPredReg::Container;
// Vec, PredVec
diff --git a/src/arch/arm/types.hh b/src/arch/arm/types.hh
index e802d04..c3e8db9 100644
--- a/src/arch/arm/types.hh
+++ b/src/arch/arm/types.hh
@@ -826,7 +826,6 @@
constexpr unsigned VecRegSizeBytes = MaxSveVecLenInBytes;
constexpr unsigned VecPredRegSizeBits = MaxSveVecLenInBytes;
- constexpr unsigned VecPredRegHasPackedRepr = false;
} // namespace ArmISA
#endif
diff --git a/src/arch/generic/vec_pred_reg.hh
b/src/arch/generic/vec_pred_reg.hh
index 54228a1..fce2706 100644
--- a/src/arch/generic/vec_pred_reg.hh
+++ b/src/arch/generic/vec_pred_reg.hh
@@ -38,9 +38,11 @@
#include <array>
#include <cassert>
+#include <cstdint>
+#include <string>
+#include <type_traits>
#include <vector>
-#include "arch/generic/vec_reg.hh"
#include "base/cprintf.hh"
#include "sim/serialize_handlers.hh"
@@ -387,14 +389,7 @@
/// Dummy type aliases and constants for architectures that do not
implement
/// vector predicate registers.
/// @{
-constexpr bool DummyVecPredRegHasPackedRepr = false;
-using DummyVecPredReg = VecPredRegT<DummyVecElem, DummyNumVecElemPerVecReg,
- DummyVecPredRegHasPackedRepr, false>;
-using DummyConstVecPredReg = VecPredRegT<DummyVecElem,
- DummyNumVecElemPerVecReg,
- DummyVecPredRegHasPackedRepr,
true>;
-using DummyVecPredRegContainer = DummyVecPredReg::Container;
-constexpr size_t DummyVecPredRegSizeBits = 8;
+using DummyVecPredRegContainer = VecPredRegContainer<8, false>;
/// @}
#endif // __ARCH_GENERIC_VEC_PRED_REG_HH__
diff --git a/src/arch/generic/vec_reg.hh b/src/arch/generic/vec_reg.hh
index 070fcfb..d9a764f 100644
--- a/src/arch/generic/vec_reg.hh
+++ b/src/arch/generic/vec_reg.hh
@@ -264,8 +264,6 @@
constexpr unsigned DummyNumVecElemPerVecReg = 2;
using DummyVecRegContainer =
VecRegContainer<DummyNumVecElemPerVecReg * sizeof(DummyVecElem)>;
-constexpr size_t DummyVecRegSizeBytes = DummyNumVecElemPerVecReg *
- sizeof(DummyVecElem);
/** @} */
#endif /* __ARCH_GENERIC_VEC_REG_HH__ */
diff --git a/src/arch/mips/vecregs.hh b/src/arch/mips/vecregs.hh
index 53baf60..752f4c0 100644
--- a/src/arch/mips/vecregs.hh
+++ b/src/arch/mips/vecregs.hh
@@ -40,14 +40,9 @@
using VecElem = ::DummyVecElem;
using VecRegContainer = ::DummyVecRegContainer;
constexpr unsigned NumVecElemPerVecReg = ::DummyNumVecElemPerVecReg;
-constexpr size_t VecRegSizeBytes = ::DummyVecRegSizeBytes;
// Not applicable to MIPS
-using VecPredReg = ::DummyVecPredReg;
-using ConstVecPredReg = ::DummyConstVecPredReg;
using VecPredRegContainer = ::DummyVecPredRegContainer;
-constexpr size_t VecPredRegSizeBits = ::DummyVecPredRegSizeBits;
-constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr;
} // namespace MipsISA
diff --git a/src/arch/null/vecregs.hh b/src/arch/null/vecregs.hh
index e56a431..016b99c 100644
--- a/src/arch/null/vecregs.hh
+++ b/src/arch/null/vecregs.hh
@@ -48,14 +48,9 @@
using VecElem = ::DummyVecElem;
using VecRegContainer = ::DummyVecRegContainer;
constexpr unsigned NumVecElemPerVecReg = ::DummyNumVecElemPerVecReg;
-constexpr size_t VecRegSizeBytes = ::DummyVecRegSizeBytes;
// Not applicable to null
-using VecPredReg = ::DummyVecPredReg;
-using ConstVecPredReg = ::DummyConstVecPredReg;
using VecPredRegContainer = ::DummyVecPredRegContainer;
-constexpr size_t VecPredRegSizeBits = ::DummyVecPredRegSizeBits;
-constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr;
}
diff --git a/src/arch/power/vecregs.hh b/src/arch/power/vecregs.hh
index 10f658c..974e0ef 100644
--- a/src/arch/power/vecregs.hh
+++ b/src/arch/power/vecregs.hh
@@ -41,14 +41,9 @@
using VecElem = ::DummyVecElem;
using VecRegContainer = ::DummyVecRegContainer;
constexpr unsigned NumVecElemPerVecReg = ::DummyNumVecElemPerVecReg;
-constexpr size_t VecRegSizeBytes = ::DummyVecRegSizeBytes;
// Not applicable to Power
-using VecPredReg = ::DummyVecPredReg;
-using ConstVecPredReg = ::DummyConstVecPredReg;
using VecPredRegContainer = ::DummyVecPredRegContainer;
-constexpr size_t VecPredRegSizeBits = ::DummyVecPredRegSizeBits;
-constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr;
} // namespace PowerISA
diff --git a/src/arch/riscv/vecregs.hh b/src/arch/riscv/vecregs.hh
index ab2b3cb..f809520 100644
--- a/src/arch/riscv/vecregs.hh
+++ b/src/arch/riscv/vecregs.hh
@@ -58,14 +58,9 @@
using VecElem = ::DummyVecElem;
using VecRegContainer = ::DummyVecRegContainer;
constexpr unsigned NumVecElemPerVecReg = ::DummyNumVecElemPerVecReg;
-constexpr size_t VecRegSizeBytes = ::DummyVecRegSizeBytes;
// Not applicable to RISC-V
-using VecPredReg = ::DummyVecPredReg;
-using ConstVecPredReg = ::DummyConstVecPredReg;
using VecPredRegContainer = ::DummyVecPredRegContainer;
-constexpr size_t VecPredRegSizeBits = ::DummyVecPredRegSizeBits;
-constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr;
}
diff --git a/src/arch/sparc/vecregs.hh b/src/arch/sparc/vecregs.hh
index b5f73d4..480b26d 100644
--- a/src/arch/sparc/vecregs.hh
+++ b/src/arch/sparc/vecregs.hh
@@ -39,14 +39,9 @@
using VecElem = ::DummyVecElem;
using VecRegContainer = ::DummyVecRegContainer;
constexpr unsigned NumVecElemPerVecReg = ::DummyNumVecElemPerVecReg;
-constexpr size_t VecRegSizeBytes = ::DummyVecRegSizeBytes;
// Not applicable to SPARC
-using VecPredReg = ::DummyVecPredReg;
-using ConstVecPredReg = ::DummyConstVecPredReg;
using VecPredRegContainer = ::DummyVecPredRegContainer;
-constexpr size_t VecPredRegSizeBits = ::DummyVecPredRegSizeBits;
-constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr;
} // namespace SparcISA
diff --git a/src/arch/x86/vecregs.hh b/src/arch/x86/vecregs.hh
index 464200f..43f58bf 100644
--- a/src/arch/x86/vecregs.hh
+++ b/src/arch/x86/vecregs.hh
@@ -53,14 +53,9 @@
using VecElem = ::DummyVecElem;
using VecRegContainer = ::DummyVecRegContainer;
constexpr unsigned NumVecElemPerVecReg = ::DummyNumVecElemPerVecReg;
-constexpr size_t VecRegSizeBytes = ::DummyVecRegSizeBytes;
// Not applicable to x86
-using VecPredReg = ::DummyVecPredReg;
-using ConstVecPredReg = ::DummyConstVecPredReg;
using VecPredRegContainer = ::DummyVecPredRegContainer;
-constexpr size_t VecPredRegSizeBits = ::DummyVecPredRegSizeBits;
-constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr;
} // namespace X86ISA
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/42003
To unsubscribe, or for help writing mail filters, visit
https://gem5-review.googlesource.com/settings
Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I93d9e53c503e375a2f901bb6f7f4c00a7cdadb20
Gerrit-Change-Number: 42003
Gerrit-PatchSet: 16
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-Reviewer: Andreas Sandberg <[email protected]>
Gerrit-Reviewer: Gabe Black <[email protected]>
Gerrit-Reviewer: Giacomo Travaglini <[email protected]>
Gerrit-Reviewer: kokoro <[email protected]>
Gerrit-MessageType: merged
_______________________________________________
gem5-dev mailing list -- [email protected]
To unsubscribe send an email to [email protected]
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
