Yu-hsin Wang has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/45269 )

Change subject: fastmodel: add ThreadContext sendFunc
......................................................................

fastmodel: add ThreadContext sendFunc

Memory space is not always outside of the CPU. For example the tightly
coupled memory (TCM) is inside of the core. To make gdb access those
kind of memory, we should use Iris memory API to read and write memory.
If we access a memory address not inside the CPU vi Iris memory API. The
CPU would fire a request via amba transport_dbg. So the change also
covers the original behavior.

Change-Id: I827c0b184f9db7db153a961dad1e69e04b1456fd
---
M src/arch/arm/fastmodel/iris/thread_context.cc
M src/arch/arm/fastmodel/iris/thread_context.hh
2 files changed, 15 insertions(+), 0 deletions(-)



diff --git a/src/arch/arm/fastmodel/iris/thread_context.cc b/src/arch/arm/fastmodel/iris/thread_context.cc
index e6168eb..ae9ae24 100644
--- a/src/arch/arm/fastmodel/iris/thread_context.cc
+++ b/src/arch/arm/fastmodel/iris/thread_context.cc
@@ -468,6 +468,20 @@
 }

 void
+ThreadContext::sendFunc(PacketPtr pkt)
+{
+    auto addr = pkt->getAddr();
+    auto size = pkt->getSize();
+    auto data = pkt->getPtr<unsigned char>();
+
+    pkt->makeResponse();
+    if (pkt->isRead())
+        readMem(addr, data, size);
+    else
+        writeMem(addr, data, size);
+}
+
+void
 ThreadContext::scheduleInstCountEvent(Event *event, Tick count)
 {
     Tick now = getCurrentInstCount();
diff --git a/src/arch/arm/fastmodel/iris/thread_context.hh b/src/arch/arm/fastmodel/iris/thread_context.hh
index 1d4fcf7..a94276b 100644
--- a/src/arch/arm/fastmodel/iris/thread_context.hh
+++ b/src/arch/arm/fastmodel/iris/thread_context.hh
@@ -166,6 +166,7 @@
     void writeMem(Addr addr, unsigned char *p, size_t size);
     bool translateAddress(Addr &paddr, iris::MemorySpaceId p_space,
                           Addr vaddr, iris::MemorySpaceId v_space);
+    void sendFunc(PacketPtr pkt);

   public:
     ThreadContext(::BaseCPU *cpu, int id, System *system,

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I827c0b184f9db7db153a961dad1e69e04b1456fd
Gerrit-Change-Number: 45269
Gerrit-PatchSet: 1
Gerrit-Owner: Yu-hsin Wang <yuhsi...@google.com>
Gerrit-MessageType: newchange
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