[gem5-dev] Change in gem5/gem5[develop]: fastmodel: Rename FastModel namespace as fastmodel

Wed, 12 May 2021 10:21:51 -0700

Daniel Carvalho has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/45434 ) 

Change subject: fastmodel: Rename FastModel namespace as fastmodel
......................................................................

fastmodel: Rename FastModel namespace as fastmodel

As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::FastModel became ::fastmodel.

Change-Id: I48e34952287e44e3fb932e13f4d006d616c1d982
Signed-off-by: Daniel R. Carvalho <[email protected]>
---
M src/arch/arm/fastmodel/CortexA76/FastModelCortexA76.py
M src/arch/arm/fastmodel/CortexA76/cortex_a76.cc
M src/arch/arm/fastmodel/CortexA76/cortex_a76.hh
M src/arch/arm/fastmodel/CortexA76/evs.cc
M src/arch/arm/fastmodel/CortexA76/evs.hh
M src/arch/arm/fastmodel/CortexA76/thread_context.cc
M src/arch/arm/fastmodel/CortexA76/thread_context.hh
M src/arch/arm/fastmodel/CortexR52/FastModelCortexR52.py
M src/arch/arm/fastmodel/CortexR52/cortex_r52.cc
M src/arch/arm/fastmodel/CortexR52/cortex_r52.hh
M src/arch/arm/fastmodel/CortexR52/evs.cc
M src/arch/arm/fastmodel/CortexR52/evs.hh
M src/arch/arm/fastmodel/CortexR52/thread_context.cc
M src/arch/arm/fastmodel/CortexR52/thread_context.hh
M src/arch/arm/fastmodel/FastModel.py
M src/arch/arm/fastmodel/GIC/FastModelGIC.py
M src/arch/arm/fastmodel/GIC/gic.cc
M src/arch/arm/fastmodel/GIC/gic.hh
M src/arch/arm/fastmodel/PL330_DMAC/FastModelPL330.py
M src/arch/arm/fastmodel/PL330_DMAC/pl330.cc
M src/arch/arm/fastmodel/PL330_DMAC/pl330.hh
M src/arch/arm/fastmodel/amba_from_tlm_bridge.cc
M src/arch/arm/fastmodel/amba_from_tlm_bridge.hh
M src/arch/arm/fastmodel/amba_ports.hh
M src/arch/arm/fastmodel/amba_to_tlm_bridge.cc
M src/arch/arm/fastmodel/amba_to_tlm_bridge.hh
M src/arch/arm/fastmodel/common/signal_receiver.hh
27 files changed, 68 insertions(+), 87 deletions(-)




diff --git a/src/arch/arm/fastmodel/CortexA76/FastModelCortexA76.py  
b/src/arch/arm/fastmodel/CortexA76/FastModelCortexA76.py

index 0b0fa8d..f6f678b 100644
--- a/src/arch/arm/fastmodel/CortexA76/FastModelCortexA76.py
+++ b/src/arch/arm/fastmodel/CortexA76/FastModelCortexA76.py
@@ -38,7 +38,7 @@

 class FastModelCortexA76(IrisBaseCPU):
     type = 'FastModelCortexA76'
-    cxx_class = 'FastModel::CortexA76'
+    cxx_class = 'fastmodel::CortexA76'
     cxx_header = 'arch/arm/fastmodel/CortexA76/cortex_a76.hh'

     cntfrq = Param.UInt64(0x1800000, "Value for the CNTFRQ timer register")
@@ -136,7 +136,7 @@

 class FastModelCortexA76Cluster(SimObject):
     type = 'FastModelCortexA76Cluster'
-    cxx_class = 'FastModel::CortexA76Cluster'
+    cxx_class = 'fastmodel::CortexA76Cluster'
     cxx_header = 'arch/arm/fastmodel/CortexA76/cortex_a76.hh'

     cores = VectorParam.FastModelCortexA76(
@@ -366,7 +366,7 @@

 class FastModelScxEvsCortexA76x1(SystemC_ScModule):
     type = 'FastModelScxEvsCortexA76x1'

-    cxx_class  
= 'FastModel::ScxEvsCortexA76<FastModel::ScxEvsCortexA76x1Types>'
+    cxx_class  
= 'fastmodel::ScxEvsCortexA76<fastmodel::ScxEvsCortexA76x1Types>'

     cxx_template_params = [ 'class Types' ]
     cxx_header = 'arch/arm/fastmodel/CortexA76/evs.hh'

@@ -377,7 +377,7 @@

 class FastModelScxEvsCortexA76x2(SystemC_ScModule):
     type = 'FastModelScxEvsCortexA76x2'

-    cxx_class  
= 'FastModel::ScxEvsCortexA76<FastModel::ScxEvsCortexA76x2Types>'
+    cxx_class  
= 'fastmodel::ScxEvsCortexA76<fastmodel::ScxEvsCortexA76x2Types>'

     cxx_template_params = [ 'class Types' ]
     cxx_header = 'arch/arm/fastmodel/CortexA76/evs.hh'

@@ -389,7 +389,7 @@

 class FastModelScxEvsCortexA76x3(SystemC_ScModule):
     type = 'FastModelScxEvsCortexA76x3'

-    cxx_class  
= 'FastModel::ScxEvsCortexA76<FastModel::ScxEvsCortexA76x3Types>'
+    cxx_class  
= 'fastmodel::ScxEvsCortexA76<fastmodel::ScxEvsCortexA76x3Types>'

     cxx_template_params = [ 'class Types' ]
     cxx_header = 'arch/arm/fastmodel/CortexA76/evs.hh'

@@ -402,7 +402,7 @@

 class FastModelScxEvsCortexA76x4(SystemC_ScModule):
     type = 'FastModelScxEvsCortexA76x4'

-    cxx_class  
= 'FastModel::ScxEvsCortexA76<FastModel::ScxEvsCortexA76x4Types>'
+    cxx_class  
= 'fastmodel::ScxEvsCortexA76<fastmodel::ScxEvsCortexA76x4Types>'

     cxx_template_params = [ 'class Types' ]
     cxx_header = 'arch/arm/fastmodel/CortexA76/evs.hh'


diff --git a/src/arch/arm/fastmodel/CortexA76/cortex_a76.cc  
b/src/arch/arm/fastmodel/CortexA76/cortex_a76.cc

index 72ce17e..1957bc3 100644
--- a/src/arch/arm/fastmodel/CortexA76/cortex_a76.cc
+++ b/src/arch/arm/fastmodel/CortexA76/cortex_a76.cc
@@ -33,8 +33,7 @@
 #include "sim/core.hh"
 #include "systemc/tlm_bridge/gem5_to_tlm.hh"

-namespace FastModel
-{
+namespace fastmodel {

 void
 CortexA76::initState()
@@ -196,4 +195,4 @@
     }
 }

-} // namespace FastModel
+} // namespace fastmodel

diff --git a/src/arch/arm/fastmodel/CortexA76/cortex_a76.hh  
b/src/arch/arm/fastmodel/CortexA76/cortex_a76.hh

index 8588f22..6ca7677 100644
--- a/src/arch/arm/fastmodel/CortexA76/cortex_a76.hh
+++ b/src/arch/arm/fastmodel/CortexA76/cortex_a76.hh
@@ -39,8 +39,7 @@

 class BaseCPU;

-namespace FastModel
-{
+namespace fastmodel {


 // The fast model exports a class called scx_evs_CortexA76x1 which  
represents
 // the subsystem described in LISA+. This class specializes it to export  
gem5

@@ -106,6 +105,6 @@
         cluster->set_evs_param(path + "." + n, val);
 }

-} // namespace FastModel
+} // namespace fastmodel

 #endif // __ARCH_ARM_FASTMODEL_CORTEXA76_CORETEX_A76_HH__

diff --git a/src/arch/arm/fastmodel/CortexA76/evs.cc  
b/src/arch/arm/fastmodel/CortexA76/evs.cc

index c322512..bf96a3c 100644
--- a/src/arch/arm/fastmodel/CortexA76/evs.cc
+++ b/src/arch/arm/fastmodel/CortexA76/evs.cc
@@ -34,8 +34,7 @@
 #include "sim/core.hh"
 #include "systemc/tlm_bridge/gem5_to_tlm.hh"

-namespace FastModel
-{
+namespace fastmodel {

 template <class Types>
 void
@@ -153,4 +152,4 @@
 template class ScxEvsCortexA76<ScxEvsCortexA76x3Types>;
 template class ScxEvsCortexA76<ScxEvsCortexA76x4Types>;

-} // namespace FastModel
+} // namespace fastmodel

diff --git a/src/arch/arm/fastmodel/CortexA76/evs.hh  
b/src/arch/arm/fastmodel/CortexA76/evs.hh

index 4aa43b6..da15c1a 100644
--- a/src/arch/arm/fastmodel/CortexA76/evs.hh
+++ b/src/arch/arm/fastmodel/CortexA76/evs.hh
@@ -47,8 +47,7 @@
 #include "systemc/ext/core/sc_module.hh"
 #include "systemc/tlm_port_wrapper.hh"

-namespace FastModel
-{
+namespace fastmodel {

 class CortexA76Cluster;

@@ -147,6 +146,6 @@
 using ScxEvsCortexA76x4 = ScxEvsCortexA76<ScxEvsCortexA76x4Types>;
 extern template class ScxEvsCortexA76<ScxEvsCortexA76x4Types>;

-} // namespace FastModel
+} // namespace fastmodel

 #endif // __ARCH_ARM_FASTMODEL_CORTEXA76_EVS_HH__

diff --git a/src/arch/arm/fastmodel/CortexA76/thread_context.cc  
b/src/arch/arm/fastmodel/CortexA76/thread_context.cc

index 44becd3..40737d6 100644
--- a/src/arch/arm/fastmodel/CortexA76/thread_context.cc
+++ b/src/arch/arm/fastmodel/CortexA76/thread_context.cc
@@ -32,8 +32,7 @@
 #include "iris/detail/IrisCppAdapter.h"
 #include "iris/detail/IrisObjects.h"

-namespace FastModel
-{
+namespace fastmodel {

 CortexA76TC::CortexA76TC(::BaseCPU *cpu, int id, System *system,
         ::BaseMMU *mmu, ::BaseISA *isa,
@@ -952,4 +951,4 @@

 std::vector<iris::MemorySpaceId> CortexA76TC::bpSpaceIds;

-} // namespace FastModel
+} // namespace fastmodel

diff --git a/src/arch/arm/fastmodel/CortexA76/thread_context.hh  
b/src/arch/arm/fastmodel/CortexA76/thread_context.hh

index d81a5f2..ccf17f0 100644
--- a/src/arch/arm/fastmodel/CortexA76/thread_context.hh
+++ b/src/arch/arm/fastmodel/CortexA76/thread_context.hh
@@ -30,8 +30,7 @@

 #include "arch/arm/fastmodel/iris/thread_context.hh"

-namespace FastModel
-{
+namespace fastmodel {


 // This ThreadContext class translates accesses to state using gem5's  
native
 // to the Iris API. This includes extracting and translating register  
indices.

@@ -65,6 +64,6 @@
     const std::vector<iris::MemorySpaceId> &getBpSpaceIds() const override;
 };

-} // namespace FastModel
+} // namespace fastmodel

 #endif // __ARCH_ARM_FASTMODEL_CORTEXA76_THREAD_CONTEXT_HH__

diff --git a/src/arch/arm/fastmodel/CortexR52/FastModelCortexR52.py  
b/src/arch/arm/fastmodel/CortexR52/FastModelCortexR52.py

index 39b7d44..e3daf78 100644
--- a/src/arch/arm/fastmodel/CortexR52/FastModelCortexR52.py
+++ b/src/arch/arm/fastmodel/CortexR52/FastModelCortexR52.py
@@ -36,7 +36,7 @@

 class FastModelCortexR52(IrisBaseCPU):
     type = 'FastModelCortexR52'
-    cxx_class = 'FastModel::CortexR52'
+    cxx_class = 'fastmodel::CortexR52'
     cxx_header = 'arch/arm/fastmodel/CortexR52/cortex_r52.hh'

     evs = Parent.evs
@@ -96,7 +96,7 @@

 class FastModelCortexR52Cluster(SimObject):
     type = 'FastModelCortexR52Cluster'
-    cxx_class = 'FastModel::CortexR52Cluster'
+    cxx_class = 'fastmodel::CortexR52Cluster'
     cxx_header = 'arch/arm/fastmodel/CortexR52/cortex_r52.hh'

     cores = VectorParam.FastModelCortexR52(
@@ -171,7 +171,7 @@

 class FastModelScxEvsCortexR52x1(SystemC_ScModule):
     type = 'FastModelScxEvsCortexR52x1'

-    cxx_class  
= 'FastModel::ScxEvsCortexR52<FastModel::ScxEvsCortexR52x1Types>'
+    cxx_class  
= 'fastmodel::ScxEvsCortexR52<fastmodel::ScxEvsCortexR52x1Types>'

     cxx_template_params = [ 'class Types' ]
     cxx_header = 'arch/arm/fastmodel/CortexR52/evs.hh'

@@ -182,7 +182,7 @@

 class FastModelScxEvsCortexR52x2(SystemC_ScModule):
     type = 'FastModelScxEvsCortexR52x2'

-    cxx_class  
= 'FastModel::ScxEvsCortexR52<FastModel::ScxEvsCortexR52x2Types>'
+    cxx_class  
= 'fastmodel::ScxEvsCortexR52<fastmodel::ScxEvsCortexR52x2Types>'

     cxx_template_params = [ 'class Types' ]
     cxx_header = 'arch/arm/fastmodel/CortexR52/evs.hh'

@@ -194,7 +194,7 @@

 class FastModelScxEvsCortexR52x3(SystemC_ScModule):
     type = 'FastModelScxEvsCortexR52x3'

-    cxx_class  
= 'FastModel::ScxEvsCortexR52<FastModel::ScxEvsCortexR52x3Types>'
+    cxx_class  
= 'fastmodel::ScxEvsCortexR52<fastmodel::ScxEvsCortexR52x3Types>'

     cxx_template_params = [ 'class Types' ]
     cxx_header = 'arch/arm/fastmodel/CortexR52/evs.hh'

@@ -207,7 +207,7 @@

 class FastModelScxEvsCortexR52x4(SystemC_ScModule):
     type = 'FastModelScxEvsCortexR52x4'

-    cxx_class  
= 'FastModel::ScxEvsCortexR52<FastModel::ScxEvsCortexR52x4Types>'
+    cxx_class  
= 'fastmodel::ScxEvsCortexR52<fastmodel::ScxEvsCortexR52x4Types>'

     cxx_template_params = [ 'class Types' ]
     cxx_header = 'arch/arm/fastmodel/CortexR52/evs.hh'


diff --git a/src/arch/arm/fastmodel/CortexR52/cortex_r52.cc  
b/src/arch/arm/fastmodel/CortexR52/cortex_r52.cc

index 98184f9..befd41a 100644
--- a/src/arch/arm/fastmodel/CortexR52/cortex_r52.cc
+++ b/src/arch/arm/fastmodel/CortexR52/cortex_r52.cc
@@ -33,8 +33,7 @@
 #include "sim/core.hh"
 #include "systemc/tlm_bridge/gem5_to_tlm.hh"

-namespace FastModel
-{
+namespace fastmodel {

 void
 CortexR52::setCluster(CortexR52Cluster *_cluster, int _num)
@@ -152,4 +151,4 @@
     }
 }

-} // namespace FastModel
+} // namespace fastmodel

diff --git a/src/arch/arm/fastmodel/CortexR52/cortex_r52.hh  
b/src/arch/arm/fastmodel/CortexR52/cortex_r52.hh

index bf19e51..cab3b95 100644
--- a/src/arch/arm/fastmodel/CortexR52/cortex_r52.hh
+++ b/src/arch/arm/fastmodel/CortexR52/cortex_r52.hh
@@ -39,8 +39,7 @@

 class BaseCPU;

-namespace FastModel
-{
+namespace fastmodel {


 // The fast model exports a class called scx_evs_CortexR52x1 which  
represents
 // the subsystem described in LISA+. This class specializes it to export  
gem5

@@ -104,6 +103,6 @@
         cluster->set_evs_param(path + "." + n, val);
 }

-} // namespace FastModel
+} // namespace fastmodel

 #endif // __ARCH_ARM_FASTMODEL_CORTEXR52_CORETEX_R52_HH__

diff --git a/src/arch/arm/fastmodel/CortexR52/evs.cc  
b/src/arch/arm/fastmodel/CortexR52/evs.cc

index 6aed3bd..1c6e203 100644
--- a/src/arch/arm/fastmodel/CortexR52/evs.cc
+++ b/src/arch/arm/fastmodel/CortexR52/evs.cc
@@ -33,8 +33,7 @@
 #include "sim/core.hh"
 #include "systemc/tlm_bridge/gem5_to_tlm.hh"

-namespace FastModel
-{
+namespace fastmodel {

 template <class Types>
 void
@@ -131,4 +130,4 @@
 template class ScxEvsCortexR52<ScxEvsCortexR52x3Types>;
 template class ScxEvsCortexR52<ScxEvsCortexR52x4Types>;

-} // namespace FastModel
+} // namespace fastmodel

diff --git a/src/arch/arm/fastmodel/CortexR52/evs.hh  
b/src/arch/arm/fastmodel/CortexR52/evs.hh

index 3fa5980..20bc018 100644
--- a/src/arch/arm/fastmodel/CortexR52/evs.hh
+++ b/src/arch/arm/fastmodel/CortexR52/evs.hh
@@ -49,8 +49,7 @@
 #include "systemc/ext/core/sc_module.hh"
 #include "systemc/tlm_port_wrapper.hh"

-namespace FastModel
-{
+namespace fastmodel {

 class CortexR52Cluster;

@@ -181,6 +180,6 @@
 using ScxEvsCortexR52x4 = ScxEvsCortexR52<ScxEvsCortexR52x4Types>;
 extern template class ScxEvsCortexR52<ScxEvsCortexR52x4Types>;

-} // namespace FastModel
+} // namespace fastmodel

 #endif // __ARCH_ARM_FASTMODEL_CORTEXR52_EVS_HH__

diff --git a/src/arch/arm/fastmodel/CortexR52/thread_context.cc  
b/src/arch/arm/fastmodel/CortexR52/thread_context.cc

index fbf6b03..0b501ef 100644
--- a/src/arch/arm/fastmodel/CortexR52/thread_context.cc
+++ b/src/arch/arm/fastmodel/CortexR52/thread_context.cc
@@ -32,8 +32,7 @@
 #include "iris/detail/IrisCppAdapter.h"
 #include "iris/detail/IrisObjects.h"

-namespace FastModel
-{
+namespace fastmodel {

 CortexR52TC::CortexR52TC(
         ::BaseCPU *cpu, int id, System *system, ::BaseMMU *mmu,
@@ -193,4 +192,4 @@

 std::vector<iris::MemorySpaceId> CortexR52TC::bpSpaceIds;

-} // namespace FastModel
+} // namespace fastmodel

diff --git a/src/arch/arm/fastmodel/CortexR52/thread_context.hh  
b/src/arch/arm/fastmodel/CortexR52/thread_context.hh

index 41223c9..f23a293 100644
--- a/src/arch/arm/fastmodel/CortexR52/thread_context.hh
+++ b/src/arch/arm/fastmodel/CortexR52/thread_context.hh
@@ -30,8 +30,7 @@

 #include "arch/arm/fastmodel/iris/thread_context.hh"

-namespace FastModel
-{
+namespace fastmodel {


 // This ThreadContext class translates accesses to state using gem5's  
native
 // to the Iris API. This includes extracting and translating register  
indices.

@@ -104,6 +103,6 @@
     }
 };

-} // namespace FastModel
+} // namespace fastmodel

 #endif // __ARCH_ARM_FASTMODEL_CORTEXR52_THREAD_CONTEXT_HH__

diff --git a/src/arch/arm/fastmodel/FastModel.py  
b/src/arch/arm/fastmodel/FastModel.py

index d35264a..534a15e 100644
--- a/src/arch/arm/fastmodel/FastModel.py
+++ b/src/arch/arm/fastmodel/FastModel.py
@@ -93,7 +93,7 @@

 class AmbaToTlmBridge64(SystemC_ScModule):
     type = 'AmbaToTlmBridge64'
-    cxx_class = 'FastModel::AmbaToTlmBridge64'
+    cxx_class = 'fastmodel::AmbaToTlmBridge64'
     cxx_header = 'arch/arm/fastmodel/amba_to_tlm_bridge.hh'

     amba = AmbaTargetSocket(64, 'AMBA PV target socket')
@@ -101,7 +101,7 @@

 class AmbaFromTlmBridge64(SystemC_ScModule):
     type = 'AmbaFromTlmBridge64'
-    cxx_class = 'FastModel::AmbaFromTlmBridge64'
+    cxx_class = 'fastmodel::AmbaFromTlmBridge64'
     cxx_header = 'arch/arm/fastmodel/amba_from_tlm_bridge.hh'

     tlm = TlmTargetSocket(64, 'TLM target socket')

diff --git a/src/arch/arm/fastmodel/GIC/FastModelGIC.py  
b/src/arch/arm/fastmodel/GIC/FastModelGIC.py

index ac81de5..9212735 100644
--- a/src/arch/arm/fastmodel/GIC/FastModelGIC.py
+++ b/src/arch/arm/fastmodel/GIC/FastModelGIC.py
@@ -66,7 +66,7 @@

 class SCFastModelGIC(SystemC_ScModule):
     type = 'SCFastModelGIC'
-    cxx_class = 'FastModel::SCGIC'
+    cxx_class = 'fastmodel::SCGIC'
     cxx_header = 'arch/arm/fastmodel/GIC/gic.hh'


     enabled = Param.Bool(True, "Enable GICv3 functionality; when false  
the "

@@ -464,7 +464,7 @@

 class FastModelGIC(BaseGic):
     type = 'FastModelGIC'
-    cxx_class = 'FastModel::GIC'
+    cxx_class = 'fastmodel::GIC'
     cxx_header = 'arch/arm/fastmodel/GIC/gic.hh'

     sc_gic = Param.SCFastModelGIC(SCFastModelGIC(),

diff --git a/src/arch/arm/fastmodel/GIC/gic.cc  
b/src/arch/arm/fastmodel/GIC/gic.cc

index 11bc482..da61858 100644
--- a/src/arch/arm/fastmodel/GIC/gic.cc
+++ b/src/arch/arm/fastmodel/GIC/gic.cc
@@ -31,8 +31,7 @@
 #include "params/FastModelGIC.hh"
 #include "params/SCFastModelGIC.hh"

-namespace FastModel
-{
+namespace fastmodel {

 int
 SCGIC::Terminator::countUnbound(const Initiators &inits)
@@ -357,4 +356,4 @@
            (version == GicVersion::GIC_V4 && scGIC->params().has_gicv4_1);
 }

-} // namespace FastModel
+} // namespace fastmodel

diff --git a/src/arch/arm/fastmodel/GIC/gic.hh  
b/src/arch/arm/fastmodel/GIC/gic.hh

index b8c75d5..bf6c00a 100644
--- a/src/arch/arm/fastmodel/GIC/gic.hh
+++ b/src/arch/arm/fastmodel/GIC/gic.hh
@@ -43,8 +43,7 @@
 #include "systemc/ext/core/sc_module_name.hh"
 #include "systemc/sc_port_wrapper.hh"

-namespace FastModel
-{
+namespace fastmodel {

 // The fast model exports a class called scx_evs_GIC which represents

 // the subsystem described in LISA+. This class specializes it to export  
gem5

@@ -135,6 +134,6 @@
     Tick write(PacketPtr pkt) override { return 0; }
 };

-} // namespace FastModel
+} // namespace fastmodel

 #endif // __ARCH_ARM_FASTMODEL_GIC_GIC_HH__

diff --git a/src/arch/arm/fastmodel/PL330_DMAC/FastModelPL330.py  
b/src/arch/arm/fastmodel/PL330_DMAC/FastModelPL330.py

index 5116006..6cd6c98 100644
--- a/src/arch/arm/fastmodel/PL330_DMAC/FastModelPL330.py
+++ b/src/arch/arm/fastmodel/PL330_DMAC/FastModelPL330.py
@@ -30,7 +30,7 @@

 class FastModelPL330(SystemC_ScModule):
     type = 'FastModelPL330'
-    cxx_class = 'FastModel::PL330'
+    cxx_class = 'fastmodel::PL330'
     cxx_header = 'arch/arm/fastmodel/PL330_DMAC/pl330.hh'

     clock = Param.Frequency("Clock frequency")

diff --git a/src/arch/arm/fastmodel/PL330_DMAC/pl330.cc  
b/src/arch/arm/fastmodel/PL330_DMAC/pl330.cc

index f86b860..98943e2 100644
--- a/src/arch/arm/fastmodel/PL330_DMAC/pl330.cc
+++ b/src/arch/arm/fastmodel/PL330_DMAC/pl330.cc
@@ -32,8 +32,7 @@
 #include "params/FastModelPL330.hh"
 #include "sim/core.hh"

-namespace FastModel
-{
+namespace fastmodel {

 PL330::PL330(const FastModelPL330Params &params,
              sc_core::sc_module_name _name) :
@@ -258,4 +257,4 @@
     clockRateControl->set_mul_div(sim_clock::Int::s, clockPeriod);
 }

-} // namespace FastModel
+} // namespace fastmodel

diff --git a/src/arch/arm/fastmodel/PL330_DMAC/pl330.hh  
b/src/arch/arm/fastmodel/PL330_DMAC/pl330.hh

index 3db6d96..b8d0f1c 100644
--- a/src/arch/arm/fastmodel/PL330_DMAC/pl330.hh
+++ b/src/arch/arm/fastmodel/PL330_DMAC/pl330.hh
@@ -46,8 +46,7 @@
 #include "systemc/ext/core/sc_module_name.hh"
 #include "systemc/sc_port_wrapper.hh"

-namespace FastModel
-{
+namespace fastmodel {

 class PL330 : public scx_evs_PL330
 {
@@ -86,6 +85,6 @@
     void start_of_simulation() override;
 };

-} // namespace FastModel
+} // namespace fastmodel

 #endif // __ARCH_ARM_FASTMODEL_PL330_PL330_HH__

diff --git a/src/arch/arm/fastmodel/amba_from_tlm_bridge.cc  
b/src/arch/arm/fastmodel/amba_from_tlm_bridge.cc

index fbabc7a..fbc10cc 100644
--- a/src/arch/arm/fastmodel/amba_from_tlm_bridge.cc
+++ b/src/arch/arm/fastmodel/amba_from_tlm_bridge.cc
@@ -29,8 +29,7 @@

 #include "params/AmbaFromTlmBridge64.hh"

-namespace FastModel
-{
+namespace fastmodel {

 AmbaFromTlmBridge64::AmbaFromTlmBridge64(const char *name) :
     amba_pv::amba_pv_from_tlm_bridge<64>(name),
@@ -51,10 +50,10 @@
     }
 }

-} // namespace FastModel
+} // namespace fastmodel

-FastModel::AmbaFromTlmBridge64 *
+fastmodel::AmbaFromTlmBridge64 *
 AmbaFromTlmBridge64Params::create() const
 {
-    return new FastModel::AmbaFromTlmBridge64(name.c_str());
+    return new fastmodel::AmbaFromTlmBridge64(name.c_str());
 }

diff --git a/src/arch/arm/fastmodel/amba_from_tlm_bridge.hh  
b/src/arch/arm/fastmodel/amba_from_tlm_bridge.hh

index 98ff74d..eecf50d 100644
--- a/src/arch/arm/fastmodel/amba_from_tlm_bridge.hh
+++ b/src/arch/arm/fastmodel/amba_from_tlm_bridge.hh
@@ -35,8 +35,7 @@
 #include "arch/arm/fastmodel/amba_ports.hh"
 #include "systemc/tlm_port_wrapper.hh"

-namespace FastModel
-{
+namespace fastmodel {

 // A wrapper around the fast model AMBA -> TLM bridge which provides
 // gem5_getPort.
@@ -52,6 +51,6 @@
     sc_gem5::TlmTargetWrapper<64> tlmWrapper;
 };

-} // namespace FastModel
+} // namespace fastmodel

 #endif // __ARCH_ARM_FASTMODEL_AMBA_FROM_TLM_BRIDGE_HH__

diff --git a/src/arch/arm/fastmodel/amba_ports.hh  
b/src/arch/arm/fastmodel/amba_ports.hh

index b086eb4..9fc4b25 100644
--- a/src/arch/arm/fastmodel/amba_ports.hh
+++ b/src/arch/arm/fastmodel/amba_ports.hh
@@ -35,14 +35,13 @@

 #include "systemc/tlm_port_wrapper.hh"

-namespace FastModel
-{
+namespace fastmodel {

 typedef sc_gem5::TlmInitiatorWrapper<
     64, amba_pv::amba_pv_protocol_types> AmbaInitiator;
 typedef sc_gem5::TlmTargetWrapper<
     64, amba_pv::amba_pv_protocol_types> AmbaTarget;

-} // namespace FastModel
+} // namespace fastmodel

 #endif // __ARCH_ARM_FASTMODEL_AMBA_PORTS_HH__

diff --git a/src/arch/arm/fastmodel/amba_to_tlm_bridge.cc  
b/src/arch/arm/fastmodel/amba_to_tlm_bridge.cc

index 8826f3e..082494e 100644
--- a/src/arch/arm/fastmodel/amba_to_tlm_bridge.cc
+++ b/src/arch/arm/fastmodel/amba_to_tlm_bridge.cc
@@ -65,8 +65,7 @@

 }

-namespace FastModel
-{
+namespace fastmodel {

 AmbaToTlmBridge64::AmbaToTlmBridge64(const sc_core::sc_module_name& name) :
     amba_pv::amba_pv_to_tlm_bridge<64>(name),
@@ -165,10 +164,10 @@
         trans.set_extension(atomic_ex);
 }

-} // namespace FastModel
+} // namespace fastmodel

-FastModel::AmbaToTlmBridge64 *
+fastmodel::AmbaToTlmBridge64 *
 AmbaToTlmBridge64Params::create() const
 {
-    return new FastModel::AmbaToTlmBridge64(name.c_str());
+    return new fastmodel::AmbaToTlmBridge64(name.c_str());
 }

diff --git a/src/arch/arm/fastmodel/amba_to_tlm_bridge.hh  
b/src/arch/arm/fastmodel/amba_to_tlm_bridge.hh

index 0bb4c20..3171ba6 100644
--- a/src/arch/arm/fastmodel/amba_to_tlm_bridge.hh
+++ b/src/arch/arm/fastmodel/amba_to_tlm_bridge.hh
@@ -35,8 +35,7 @@
 #include "arch/arm/fastmodel/amba_ports.hh"
 #include "systemc/tlm_port_wrapper.hh"

-namespace FastModel
-{
+namespace fastmodel {

 // A wrapper around the fast model TLM -> AMBA bridge which provides
 // gem5_getPort.
@@ -64,6 +63,6 @@
     AmbaTarget ambaWrapper;
 };

-} // namespace FastModel
+} // namespace fastmodel

 #endif // __ARCH_ARM_FASTMODEL_AMBA_TO_TLM_BRIDGE_HH__

diff --git a/src/arch/arm/fastmodel/common/signal_receiver.hh  
b/src/arch/arm/fastmodel/common/signal_receiver.hh

index 8af444b..f57eb33 100644
--- a/src/arch/arm/fastmodel/common/signal_receiver.hh
+++ b/src/arch/arm/fastmodel/common/signal_receiver.hh
@@ -35,8 +35,10 @@

 #include <functional>

-namespace FastModel
-{
+#include "base/compiler.hh"
+
+GEM5_DEPRECATED_NAMESPACE(FastModel, fastmodel);
+namespace fastmodel {

 class SignalReceiver : public amba_pv::signal_slave_base<bool>
 {
@@ -74,6 +76,6 @@
     }
 };

-} // namespace FastModel
+} // namespace fastmodel

 #endif // __ARCH_ARM_FASTMODEL_COMMON_SIGNAL_RECEIVER_HH__

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I48e34952287e44e3fb932e13f4d006d616c1d982
Gerrit-Change-Number: 45434
Gerrit-PatchSet: 1
Gerrit-Owner: Daniel Carvalho <[email protected]>
Gerrit-MessageType: newchange

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