Daniel Carvalho has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/45402 )
Change subject: misc: Rename SimClock namespace as sim_clock
......................................................................
misc: Rename SimClock namespace as sim_clock
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.
::SimClock became ::sim_clock.
Change-Id: I25b8cfc93f283081bc2add9fdef6fec7d7ff3846
Signed-off-by: Daniel R. Carvalho <[email protected]>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45402
Tested-by: kokoro <[email protected]>
Maintainer: Bobby R. Bruce <[email protected]>
Reviewed-by: Hoa Nguyen <[email protected]>
---
M src/arch/arm/fastmodel/CortexA76/evs.cc
M src/arch/arm/fastmodel/CortexR52/evs.cc
M src/arch/arm/fastmodel/PL330_DMAC/pl330.cc
M src/arch/arm/semihosting.cc
M src/arch/arm/semihosting.hh
M src/base/time.cc
M src/cpu/inst_pb_trace.cc
M src/cpu/kvm/timer.hh
M src/cpu/kvm/x86_cpu.cc
M src/cpu/o3/probe/elastic_trace.cc
M src/cpu/testers/traffic_gen/trace_gen.cc
M src/cpu/trace/trace_cpu.cc
M src/dev/arm/energy_ctrl.cc
M src/dev/arm/energy_ctrl.hh
M src/dev/arm/generic_timer.cc
M src/dev/arm/rtc_pl031.cc
M src/dev/arm/rv_ctrl.cc
M src/dev/intel_8254_timer.cc
M src/dev/mc146818.cc
M src/dev/mc146818.hh
M src/dev/mips/malta_io.cc
M src/dev/net/etherdump.cc
M src/dev/net/etherswitch.cc
M src/dev/net/ethertap.cc
M src/dev/net/i8254xGBe.cc
M src/dev/net/i8254xGBe.hh
M src/dev/net/ns_gige.cc
M src/dev/serial/uart8250.cc
M src/gpu-compute/gpu_compute_driver.cc
M src/kern/freebsd/events.cc
M src/kern/linux/events.cc
M src/mem/cache/tags/base.cc
M src/mem/comm_monitor.cc
M src/mem/drampower.cc
M src/mem/dramsim2.cc
M src/mem/dramsim3.cc
M src/mem/mem_interface.cc
M src/mem/probes/mem_trace.cc
M src/mem/qos/mem_ctrl.cc
M src/mem/xbar.cc
M src/sim/clocked_object.hh
M src/sim/core.cc
M src/sim/core.hh
M src/sim/power/thermal_model.cc
M src/sim/pseudo_inst.cc
M src/sim/root.cc
M src/sim/syscall_emul.hh
M src/systemc/core/sc_time.cc
M src/systemc/tlm_bridge/tlm_to_gem5.cc
M src/systemc/utils/vcd.cc
50 files changed, 111 insertions(+), 103 deletions(-)
Approvals:
Hoa Nguyen: Looks good to me, approved
Bobby R. Bruce: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/arm/fastmodel/CortexA76/evs.cc
b/src/arch/arm/fastmodel/CortexA76/evs.cc
index 02ccaab..c322512 100644
--- a/src/arch/arm/fastmodel/CortexA76/evs.cc
+++ b/src/arch/arm/fastmodel/CortexA76/evs.cc
@@ -41,7 +41,7 @@
void
ScxEvsCortexA76<Types>::setClkPeriod(Tick clk_period)
{
- clockRateControl->set_mul_div(SimClock::Int::s, clk_period);
+ clockRateControl->set_mul_div(sim_clock::Int::s, clk_period);
}
template <class Types>
diff --git a/src/arch/arm/fastmodel/CortexR52/evs.cc
b/src/arch/arm/fastmodel/CortexR52/evs.cc
index f4ce61e..6aed3bd 100644
--- a/src/arch/arm/fastmodel/CortexR52/evs.cc
+++ b/src/arch/arm/fastmodel/CortexR52/evs.cc
@@ -40,7 +40,7 @@
void
ScxEvsCortexR52<Types>::setClkPeriod(Tick clk_period)
{
- clockRateControl->set_mul_div(SimClock::Int::s, clk_period);
+ clockRateControl->set_mul_div(sim_clock::Int::s, clk_period);
}
template <class Types>
diff --git a/src/arch/arm/fastmodel/PL330_DMAC/pl330.cc
b/src/arch/arm/fastmodel/PL330_DMAC/pl330.cc
index e835304..f86b860 100644
--- a/src/arch/arm/fastmodel/PL330_DMAC/pl330.cc
+++ b/src/arch/arm/fastmodel/PL330_DMAC/pl330.cc
@@ -255,7 +255,7 @@
PL330::start_of_simulation()
{
// Set the clock rate using the divider inside the EVS.
- clockRateControl->set_mul_div(SimClock::Int::s, clockPeriod);
+ clockRateControl->set_mul_div(sim_clock::Int::s, clockPeriod);
}
} // namespace FastModel
diff --git a/src/arch/arm/semihosting.cc b/src/arch/arm/semihosting.cc
index 989d74c..6a52e07 100644
--- a/src/arch/arm/semihosting.cc
+++ b/src/arch/arm/semihosting.cc
@@ -500,13 +500,13 @@
ArmSemihosting::RetErrno
ArmSemihosting::callClock(ThreadContext *tc)
{
- return retOK(curTick() / (SimClock::Int::s / 100));
+ return retOK(curTick() / (sim_clock::Int::s / 100));
}
ArmSemihosting::RetErrno
ArmSemihosting::callTime(ThreadContext *tc)
{
- return retOK(timeBase + round(curTick() / SimClock::Float::s));
+ return retOK(timeBase + round(curTick() / sim_clock::Float::s));
}
ArmSemihosting::RetErrno
@@ -672,7 +672,7 @@
ArmSemihosting::RetErrno
ArmSemihosting::callTickFreq(ThreadContext *tc)
{
- return retOK(semiTick(SimClock::Frequency));
+ return retOK(semiTick(sim_clock::Frequency));
}
diff --git a/src/arch/arm/semihosting.hh b/src/arch/arm/semihosting.hh
index 6a08935..d195d91 100644
--- a/src/arch/arm/semihosting.hh
+++ b/src/arch/arm/semihosting.hh
@@ -414,7 +414,7 @@
unsigned
calcTickShift() const
{
- int msb = findMsbSet(SimClock::Frequency);
+ int msb = findMsbSet(sim_clock::Frequency);
return msb > 31 ? msb - 31 : 0;
}
uint64_t
diff --git a/src/base/time.cc b/src/base/time.cc
index 92d69c0..35e1260 100644
--- a/src/base/time.cc
+++ b/src/base/time.cc
@@ -53,17 +53,17 @@
void
Time::setTick(Tick ticks)
{
- uint64_t secs = ticks / SimClock::Frequency;
- ticks -= secs * SimClock::Frequency;
- uint64_t nsecs = static_cast<uint64_t>(ticks * SimClock::Float::GHz);
+ uint64_t secs = ticks / sim_clock::Frequency;
+ ticks -= secs * sim_clock::Frequency;
+ uint64_t nsecs = static_cast<uint64_t>(ticks * sim_clock::Float::GHz);
set(secs, nsecs);
}
Tick
Time::getTick() const
{
- return sec() * SimClock::Frequency +
- static_cast<uint64_t>(nsec() * SimClock::Float::ns);
+ return sec() * sim_clock::Frequency +
+ static_cast<uint64_t>(nsec() * sim_clock::Float::ns);
}
std::string
diff --git a/src/cpu/inst_pb_trace.cc b/src/cpu/inst_pb_trace.cc
index f4a40f8..3f61ae5 100644
--- a/src/cpu/inst_pb_trace.cc
+++ b/src/cpu/inst_pb_trace.cc
@@ -86,7 +86,7 @@
ProtoMessage::InstHeader header_msg;
header_msg.set_obj_id("gem5 generated instruction trace");
header_msg.set_ver(0);
- header_msg.set_tick_freq(SimClock::Frequency);
+ header_msg.set_tick_freq(sim_clock::Frequency);
header_msg.set_has_mem(true);
traceStream->write(header_msg);
diff --git a/src/cpu/kvm/timer.hh b/src/cpu/kvm/timer.hh
index 7daa3cd..cbfc9e4 100644
--- a/src/cpu/kvm/timer.hh
+++ b/src/cpu/kvm/timer.hh
@@ -129,7 +129,7 @@
* @return Nanoseconds executed in VM converted to simulation ticks
*/
Tick ticksFromHostNs(uint64_t ns) {
- return ns * hostFactor * SimClock::Float::ns;
+ return ns * hostFactor * sim_clock::Float::ns;
}
protected:
@@ -147,7 +147,7 @@
* @return Simulation ticks converted into nanoseconds on the host
*/
uint64_t hostNs(Tick ticks) {
- return ticks / (SimClock::Float::ns * hostFactor);
+ return ticks / (sim_clock::Float::ns * hostFactor);
}
/**
diff --git a/src/cpu/kvm/x86_cpu.cc b/src/cpu/kvm/x86_cpu.cc
index 4fe74f8..aae75fe 100644
--- a/src/cpu/kvm/x86_cpu.cc
+++ b/src/cpu/kvm/x86_cpu.cc
@@ -1248,7 +1248,7 @@
// Limit the run to 1 millisecond. That is hopefully enough to
// reach an interrupt window. Otherwise, we'll just try again
// later.
- return BaseKvmCPU::kvmRun(1 * SimClock::Float::ms);
+ return BaseKvmCPU::kvmRun(1 * sim_clock::Float::ms);
} else {
DPRINTF(Drain, "kvmRunDrain: Delivering pending IO\n");
diff --git a/src/cpu/o3/probe/elastic_trace.cc
b/src/cpu/o3/probe/elastic_trace.cc
index 1c8d051..f95921b 100644
--- a/src/cpu/o3/probe/elastic_trace.cc
+++ b/src/cpu/o3/probe/elastic_trace.cc
@@ -87,13 +87,13 @@
// Create a protobuf message for the header and write it to the stream
ProtoMessage::PacketHeader inst_pkt_header;
inst_pkt_header.set_obj_id(name());
- inst_pkt_header.set_tick_freq(SimClock::Frequency);
+ inst_pkt_header.set_tick_freq(sim_clock::Frequency);
instTraceStream->write(inst_pkt_header);
// Create a protobuf message for the header and write it to
// the stream
ProtoMessage::InstDepRecordHeader data_rec_header;
data_rec_header.set_obj_id(name());
- data_rec_header.set_tick_freq(SimClock::Frequency);
+ data_rec_header.set_tick_freq(sim_clock::Frequency);
data_rec_header.set_window_size(depWindowSize);
dataTraceStream->write(data_rec_header);
// Register a callback to flush trace records and close the output
streams.
diff --git a/src/cpu/testers/traffic_gen/trace_gen.cc
b/src/cpu/testers/traffic_gen/trace_gen.cc
index 1da2645..951765c 100644
--- a/src/cpu/testers/traffic_gen/trace_gen.cc
+++ b/src/cpu/testers/traffic_gen/trace_gen.cc
@@ -57,7 +57,7 @@
ProtoMessage::PacketHeader header_msg;
if (!trace.read(header_msg)) {
panic("Failed to read packet header from trace\n");
- } else if (header_msg.tick_freq() != SimClock::Frequency) {
+ } else if (header_msg.tick_freq() != sim_clock::Frequency) {
panic("Trace was recorded with a different tick frequency %d\n",
header_msg.tick_freq());
}
diff --git a/src/cpu/trace/trace_cpu.cc b/src/cpu/trace/trace_cpu.cc
index c478637..01e021c 100644
--- a/src/cpu/trace/trace_cpu.cc
+++ b/src/cpu/trace/trace_cpu.cc
@@ -1202,7 +1202,7 @@
if (!trace.read(header_msg)) {
panic("Failed to read packet header from %s\n", filename);
- if (header_msg.tick_freq() != SimClock::Frequency) {
+ if (header_msg.tick_freq() != sim_clock::Frequency) {
panic("Trace %s was recorded with a different tick
frequency %d\n",
header_msg.tick_freq());
}
@@ -1383,7 +1383,7 @@
if (!trace.read(header_msg)) {
panic("Failed to read packet header from %s\n", filename);
- if (header_msg.tick_freq() != SimClock::Frequency) {
+ if (header_msg.tick_freq() != sim_clock::Frequency) {
panic("Trace %s was recorded with a different tick
frequency %d\n",
header_msg.tick_freq());
}
diff --git a/src/dev/arm/energy_ctrl.cc b/src/dev/arm/energy_ctrl.cc
index 43d0d3a..9df4dda 100644
--- a/src/dev/arm/energy_ctrl.cc
+++ b/src/dev/arm/energy_ctrl.cc
@@ -99,7 +99,7 @@
break;
case DVFS_HANDLER_TRANS_LATENCY:
// Return transition latency in nanoseconds
- result = dvfsHandler->transLatency() / SimClock::Int::ns;
+ result = dvfsHandler->transLatency() / sim_clock::Int::ns;
DPRINTF(EnergyCtrl, "reading dvfs handler trans latency %d ns\n",
result);
break;
diff --git a/src/dev/arm/energy_ctrl.hh b/src/dev/arm/energy_ctrl.hh
index c9d00a5..a68a55e 100644
--- a/src/dev/arm/energy_ctrl.hh
+++ b/src/dev/arm/energy_ctrl.hh
@@ -164,7 +164,7 @@
uint32_t perfLevelToRead;
static uint32_t ticksTokHz(Tick period) {
- return (uint32_t)(SimClock::Int::ms / period);
+ return (uint32_t)(sim_clock::Int::ms / period);
}
static uint32_t toMicroVolt(double voltage) {
diff --git a/src/dev/arm/generic_timer.cc b/src/dev/arm/generic_timer.cc
index 3938092..d5028c4 100644
--- a/src/dev/arm/generic_timer.cc
+++ b/src/dev/arm/generic_timer.cc
@@ -74,7 +74,7 @@
"frequency table entries, limit surpassed\n");
// Set the active frequency to be the base
_freq = _freqTable.front();
- _period = (1.0 / _freq) * SimClock::Frequency;
+ _period = (1.0 / _freq) * sim_clock::Frequency;
}
void
@@ -187,7 +187,7 @@
_activeFreqEntry = _nextFreqEntry;
_freq = _freqTable[_activeFreqEntry];
_increment = _freqTable[0] / _freq;
- _period = (1.0 / _freq) * SimClock::Frequency;
+ _period = (1.0 / _freq) * sim_clock::Frequency;
notifyListeners();
}
@@ -244,7 +244,7 @@
}
UNSERIALIZE_SCALAR(_nextFreqEntry);
- _period = (1.0 / _freq) * SimClock::Frequency;
+ _period = (1.0 / _freq) * sim_clock::Frequency;
}
ArchTimer::ArchTimer(const std::string &name,
diff --git a/src/dev/arm/rtc_pl031.cc b/src/dev/arm/rtc_pl031.cc
index de84384..3597936 100644
--- a/src/dev/arm/rtc_pl031.cc
+++ b/src/dev/arm/rtc_pl031.cc
@@ -69,7 +69,7 @@
switch (daddr) {
case DataReg:
- data = timeVal + ((curTick() - lastWrittenTick) /
SimClock::Int::s);
+ data = timeVal + ((curTick() - lastWrittenTick) /
sim_clock::Int::s);
break;
case MatchReg:
data = matchVal;
@@ -154,7 +154,7 @@
timeVal);
uint32_t seconds_until = matchVal - timeVal;
- Tick ticks_until = SimClock::Int::s * seconds_until;
+ Tick ticks_until = sim_clock::Int::s * seconds_until;
if (matchEvent.scheduled()) {
DPRINTF(Timer, "-- Event was already schedule, de-scheduling\n");
diff --git a/src/dev/arm/rv_ctrl.cc b/src/dev/arm/rv_ctrl.cc
index 6cacb4d..63000bf 100644
--- a/src/dev/arm/rv_ctrl.cc
+++ b/src/dev/arm/rv_ctrl.cc
@@ -66,12 +66,12 @@
break;
case Clock24:
Tick clk;
- clk = SimClock::Float::MHz * curTick() * 24;
+ clk = sim_clock::Float::MHz * curTick() * 24;
pkt->setLE((uint32_t)(clk));
break;
case Clock100:
Tick clk100;
- clk100 = SimClock::Float::MHz * curTick() * 100;
+ clk100 = sim_clock::Float::MHz * curTick() * 100;
pkt->setLE((uint32_t)(clk100));
break;
case Flash:
@@ -239,9 +239,9 @@
RealViewCtrl::Device(*p.parent, RealViewCtrl::FUNC_OSC,
p.site, p.position, p.dcc, p.device)
{
- if (SimClock::Float::s / p.freq > UINT32_MAX) {
+ if (sim_clock::Float::s / p.freq > UINT32_MAX) {
fatal("Oscillator frequency out of range: %f\n",
- SimClock::Float::s / p.freq / 1E6);
+ sim_clock::Float::s / p.freq / 1E6);
}
_clockPeriod = p.freq;
@@ -286,7 +286,7 @@
uint32_t
RealViewOsc::read() const
{
- const uint32_t freq(SimClock::Float::s / _clockPeriod);
+ const uint32_t freq(sim_clock::Float::s / _clockPeriod);
DPRINTF(RVCTRL, "Reading OSC frequency: %f MHz\n", freq / 1E6);
return freq;
}
@@ -295,7 +295,7 @@
RealViewOsc::write(uint32_t freq)
{
DPRINTF(RVCTRL, "Setting new OSC frequency: %f MHz\n", freq / 1E6);
- clockPeriod(SimClock::Float::s / freq);
+ clockPeriod(sim_clock::Float::s / freq);
}
uint32_t
diff --git a/src/dev/intel_8254_timer.cc b/src/dev/intel_8254_timer.cc
index a2ba7a4..6035639 100644
--- a/src/dev/intel_8254_timer.cc
+++ b/src/dev/intel_8254_timer.cc
@@ -271,7 +271,7 @@
Intel8254Timer::Counter::CounterEvent::CounterEvent(Counter* c_ptr)
{
- interval = (Tick)(SimClock::Float::s / 1193180.0);
+ interval = (Tick)(sim_clock::Float::s / 1193180.0);
counter = c_ptr;
}
diff --git a/src/dev/mc146818.cc b/src/dev/mc146818.cc
index 5e76a23..4cd5e97 100644
--- a/src/dev/mc146818.cc
+++ b/src/dev/mc146818.cc
@@ -175,7 +175,7 @@
// from reset to active. So, we simply schedule the
// tick after 0.5s.
assert(!tickEvent.scheduled());
- schedule(tickEvent, curTick() + SimClock::Int::s / 2);
+ schedule(tickEvent, curTick() + sim_clock::Int::s / 2);
}
} break;
case RTC_STAT_REGB:
@@ -333,7 +333,7 @@
MC146818::RTCTickEvent::process()
{
DPRINTF(MC146818, "RTC clock tick\n");
- parent->schedule(this, curTick() + SimClock::Int::s);
+ parent->schedule(this, curTick() + sim_clock::Int::s);
parent->tickClock();
}
diff --git a/src/dev/mc146818.hh b/src/dev/mc146818.hh
index 0813950..bf9f59e 100644
--- a/src/dev/mc146818.hh
+++ b/src/dev/mc146818.hh
@@ -70,7 +70,7 @@
Tick offset;
RTCTickEvent(MC146818 * _parent) :
- parent(_parent), offset(SimClock::Int::s)
+ parent(_parent), offset(sim_clock::Int::s)
{}
/** Event process to occur at interrupt*/
diff --git a/src/dev/mips/malta_io.cc b/src/dev/mips/malta_io.cc
index d914d5f..a90fc94 100644
--- a/src/dev/mips/malta_io.cc
+++ b/src/dev/mips/malta_io.cc
@@ -72,7 +72,7 @@
Tick
MaltaIO::frequency() const
{
- return SimClock::Frequency / params().frequency;
+ return sim_clock::Frequency / params().frequency;
}
Tick
diff --git a/src/dev/net/etherdump.cc b/src/dev/net/etherdump.cc
index c363def..f82fded 100644
--- a/src/dev/net/etherdump.cc
+++ b/src/dev/net/etherdump.cc
@@ -94,8 +94,8 @@
EtherDump::dumpPacket(EthPacketPtr &packet)
{
pcap_pkthdr pkthdr;
- pkthdr.seconds = curTick() / SimClock::Int::s;
- pkthdr.microseconds = (curTick() / SimClock::Int::us) % 1000000ULL;
+ pkthdr.seconds = curTick() / sim_clock::Int::s;
+ pkthdr.microseconds = (curTick() / sim_clock::Int::us) % 1000000ULL;
pkthdr.caplen = std::min(packet->length, maxlen);
pkthdr.len = packet->length;
stream->write(reinterpret_cast<char *>(&pkthdr), sizeof(pkthdr));
diff --git a/src/dev/net/etherswitch.cc b/src/dev/net/etherswitch.cc
index b88d630..13439f8 100644
--- a/src/dev/net/etherswitch.cc
+++ b/src/dev/net/etherswitch.cc
@@ -182,7 +182,7 @@
if (!sendPacket(outputFifo.front())) {
DPRINTF(Ethernet, "output port busy...retry later\n");
if (!txEvent.scheduled())
- parent->schedule(txEvent, curTick() + SimClock::Int::ns);
+ parent->schedule(txEvent, curTick() + sim_clock::Int::ns);
} else {
DPRINTF(Ethernet, "packet sent: len=%d\n",
outputFifo.front()->length);
outputFifo.pop();
diff --git a/src/dev/net/ethertap.cc b/src/dev/net/ethertap.cc
index e78af5c..d5ffdd1 100644
--- a/src/dev/net/ethertap.cc
+++ b/src/dev/net/ethertap.cc
@@ -194,7 +194,7 @@
DPRINTF(Ethernet, "bus busy...buffer for retransmission\n");
packetBuffer.push(packet);
if (!txEvent.scheduled())
- schedule(txEvent, curTick() + SimClock::Int::ns);
+ schedule(txEvent, curTick() + sim_clock::Int::ns);
} else if (dump) {
dump->dump(packet);
}
@@ -216,7 +216,7 @@
}
if (!packetBuffer.empty() && !txEvent.scheduled())
- schedule(txEvent, curTick() + SimClock::Int::ns);
+ schedule(txEvent, curTick() + sim_clock::Int::ns);
}
diff --git a/src/dev/net/i8254xGBe.cc b/src/dev/net/i8254xGBe.cc
index c5affcf..88cd0d5 100644
--- a/src/dev/net/i8254xGBe.cc
+++ b/src/dev/net/i8254xGBe.cc
@@ -699,7 +699,7 @@
regs.icr = regs.icr() | t;
- Tick itr_interval = SimClock::Int::ns * 256 * regs.itr.interval();
+ Tick itr_interval = sim_clock::Int::ns * 256 * regs.itr.interval();
DPRINTF(EthernetIntr,
"EINT: postInterrupt() curTick(): %d itr: %d interval: %d\n",
curTick(), regs.itr.interval(), itr_interval);
@@ -807,7 +807,8 @@
DPRINTF(Ethernet,
"Possibly scheduling interrupt because of imr
write\n");
if (!interEvent.scheduled()) {
- Tick t = curTick() + SimClock::Int::ns * 256 *
regs.itr.interval();
+ Tick t = curTick() +
+ sim_clock::Int::ns * 256 * regs.itr.interval();
DPRINTF(Ethernet, "Scheduling for %d\n", t);
schedule(interEvent, t);
}
diff --git a/src/dev/net/i8254xGBe.hh b/src/dev/net/i8254xGBe.hh
index 2677528..b9aa200 100644
--- a/src/dev/net/i8254xGBe.hh
+++ b/src/dev/net/i8254xGBe.hh
@@ -163,7 +163,7 @@
*/
void cpuClearInt();
- Tick intClock() { return SimClock::Int::ns * 1024; }
+ Tick intClock() { return sim_clock::Int::ns * 1024; }
/** This function is used to restart the clock so it can handle things
like
* draining and resume in one place. */
diff --git a/src/dev/net/ns_gige.cc b/src/dev/net/ns_gige.cc
index cda5ad6..a350762 100644
--- a/src/dev/net/ns_gige.cc
+++ b/src/dev/net/ns_gige.cc
@@ -1395,7 +1395,7 @@
if (!txFifo.empty() && !txEvent.scheduled()) {
DPRINTF(Ethernet, "reschedule transmit\n");
- schedule(txEvent, curTick() + SimClock::Int::ns);
+ schedule(txEvent, curTick() + sim_clock::Int::ns);
}
}
diff --git a/src/dev/serial/uart8250.cc b/src/dev/serial/uart8250.cc
index d3a466b..734a8fd 100644
--- a/src/dev/serial/uart8250.cc
+++ b/src/dev/serial/uart8250.cc
@@ -72,7 +72,7 @@
void
Uart8250::scheduleIntr(Event *event)
{
- static const Tick interval = 225 * SimClock::Int::ns;
+ static const Tick interval = 225 * sim_clock::Int::ns;
DPRINTF(Uart, "Scheduling IER interrupt for %s, at cycle %lld\n",
event->name(), curTick() + interval);
if (!event->scheduled())
@@ -179,7 +179,7 @@
if (ier.thri) {
DPRINTF(Uart, "IER: IER_THRI set, scheduling TX intrrupt\n");
- if (curTick() - lastTxInt > 225 * SimClock::Int::ns) {
+ if (curTick() - lastTxInt > 225 * sim_clock::Int::ns) {
DPRINTF(Uart, "-- Interrupting Immediately... %d,%d\n",
curTick(), lastTxInt);
txIntrEvent.process();
diff --git a/src/gpu-compute/gpu_compute_driver.cc
b/src/gpu-compute/gpu_compute_driver.cc
index cd537c3..18793fc 100644
--- a/src/gpu-compute/gpu_compute_driver.cc
+++ b/src/gpu-compute/gpu_compute_driver.cc
@@ -284,7 +284,7 @@
* Derive all clock counters based on the tick. All
* device clocks are identical and perfectly in sync.
*/
- uint64_t elapsed_nsec = curTick() / SimClock::Int::ns;
+ uint64_t elapsed_nsec = curTick() / sim_clock::Int::ns;
args->gpu_clock_counter = elapsed_nsec;
args->cpu_clock_counter = elapsed_nsec;
args->system_clock_counter = elapsed_nsec;
diff --git a/src/kern/freebsd/events.cc b/src/kern/freebsd/events.cc
index 5b8b8cc..0a78076 100644
--- a/src/kern/freebsd/events.cc
+++ b/src/kern/freebsd/events.cc
@@ -57,7 +57,7 @@
// time to 0 with the assumption that quiesce will not happen. To avoid
// the quiesce handling in this case, only execute the quiesce if time
0.
if (time > 0)
- tc->quiesceTick(curTick() + SimClock::Int::ns * time);
+ tc->quiesceTick(curTick() + sim_clock::Int::ns * time);
}
} // namespace FreeBSD
diff --git a/src/kern/linux/events.cc b/src/kern/linux/events.cc
index d46fdf6..aca839e 100644
--- a/src/kern/linux/events.cc
+++ b/src/kern/linux/events.cc
@@ -90,7 +90,7 @@
// time to 0 with the assumption that quiesce will not happen. To avoid
// the quiesce handling in this case, only execute the quiesce if time
0.
if (time > 0)
- tc->quiesceTick(curTick() + SimClock::Int::ns * time);
+ tc->quiesceTick(curTick() + sim_clock::Int::ns * time);
}
} // namespace linux
diff --git a/src/mem/cache/tags/base.cc b/src/mem/cache/tags/base.cc
index 13751bc..27f557e 100644
--- a/src/mem/cache/tags/base.cc
+++ b/src/mem/cache/tags/base.cc
@@ -167,13 +167,13 @@
Tick age = blk.getAge();
int age_index;
- if (age / SimClock::Int::us < 10) { // <10us
+ if (age / sim_clock::Int::us < 10) { // <10us
age_index = 0;
- } else if (age / SimClock::Int::us < 100) { // <100us
+ } else if (age / sim_clock::Int::us < 100) { // <100us
age_index = 1;
- } else if (age / SimClock::Int::ms < 1) { // <1ms
+ } else if (age / sim_clock::Int::ms < 1) { // <1ms
age_index = 2;
- } else if (age / SimClock::Int::ms < 10) { // <10ms
+ } else if (age / sim_clock::Int::ms < 10) { // <10ms
age_index = 3;
} else
age_index = 4; // >10ms
diff --git a/src/mem/comm_monitor.cc b/src/mem/comm_monitor.cc
index 956ec1e..f33f00d 100644
--- a/src/mem/comm_monitor.cc
+++ b/src/mem/comm_monitor.cc
@@ -49,7 +49,7 @@
cpuSidePort(name() + "-cpu_side_port", *this),
samplePeriodicEvent([this]{ samplePeriodic(); }, name()),
samplePeriodTicks(params.sample_period),
- samplePeriod(params.sample_period / SimClock::Float::s),
+ samplePeriod(params.sample_period / sim_clock::Float::s),
stats(this, params)
{
DPRINTF(CommMonitor,
diff --git a/src/mem/drampower.cc b/src/mem/drampower.cc
index ef38a67..887dc5e 100644
--- a/src/mem/drampower.cc
+++ b/src/mem/drampower.cc
@@ -93,7 +93,7 @@
timingSpec.XSDLL = divCeil(p.tXSDLL, p.tCK);
// Clock period in ns
- timingSpec.clkPeriod = (p.tCK / (double)(SimClock::Int::ns));
+ timingSpec.clkPeriod = (p.tCK / (double)(sim_clock::Int::ns));
assert(timingSpec.clkPeriod != 0);
timingSpec.clkMhz = (1 / timingSpec.clkPeriod) * 1000;
return timingSpec;
diff --git a/src/mem/dramsim2.cc b/src/mem/dramsim2.cc
index 5c5c64a..f896912 100644
--- a/src/mem/dramsim2.cc
+++ b/src/mem/dramsim2.cc
@@ -144,7 +144,8 @@
port.sendRetryReq();
}
- schedule(tickEvent, curTick() + wrapper.clockPeriod() *
SimClock::Int::ns);
+ schedule(tickEvent,
+ curTick() + wrapper.clockPeriod() * sim_clock::Int::ns);
}
Tick
@@ -283,7 +284,7 @@
void DRAMSim2::readComplete(unsigned id, uint64_t addr, uint64_t cycle)
{
assert(cycle == divCeil(curTick() - startTick,
- wrapper.clockPeriod() * SimClock::Int::ns));
+ wrapper.clockPeriod() * sim_clock::Int::ns));
DPRINTF(DRAMSim2, "Read to address %lld complete\n", addr);
@@ -311,7 +312,7 @@
void DRAMSim2::writeComplete(unsigned id, uint64_t addr, uint64_t cycle)
{
assert(cycle == divCeil(curTick() - startTick,
- wrapper.clockPeriod() * SimClock::Int::ns));
+ wrapper.clockPeriod() * sim_clock::Int::ns));
DPRINTF(DRAMSim2, "Write to address %lld complete\n", addr);
diff --git a/src/mem/dramsim3.cc b/src/mem/dramsim3.cc
index 087c6ba..ecf33f3 100644
--- a/src/mem/dramsim3.cc
+++ b/src/mem/dramsim3.cc
@@ -146,7 +146,8 @@
}
}
- schedule(tickEvent, curTick() + wrapper.clockPeriod() *
SimClock::Int::ns);
+ schedule(tickEvent,
+ curTick() + wrapper.clockPeriod() * sim_clock::Int::ns);
}
Tick
diff --git a/src/mem/mem_interface.cc b/src/mem/mem_interface.cc
index 8c4b631..9147818 100644
--- a/src/mem/mem_interface.cc
+++ b/src/mem/mem_interface.cc
@@ -1800,14 +1800,14 @@
// Accumulate window energy into the total energy.
stats.totalEnergy += energy.window_energy * dram.devicesPerRank;
// Average power must not be accumulated but calculated over the time
- // since last stats reset. SimClock::Frequency is tick period not tick
+ // since last stats reset. sim_clock::Frequency is tick period not tick
// frequency.
// energy (pJ) 1e-9
// power (mW) = ----------- * ----------
// time (tick) tick_frequency
stats.averagePower = (stats.totalEnergy.value() /
(curTick() - dram.lastStatsResetTick)) *
- (SimClock::Frequency / 1000000000.0);
+ (sim_clock::Frequency / 1000000000.0);
}
void
@@ -1951,7 +1951,7 @@
avgRdBW = (bytesRead / 1000000) / simSeconds;
avgWrBW = (bytesWritten / 1000000) / simSeconds;
- peakBW = (SimClock::Frequency / dram.burstDelay()) *
+ peakBW = (sim_clock::Frequency / dram.burstDelay()) *
dram.bytesPerBurst() / 1000000;
busUtil = (avgRdBW + avgWrBW) / peakBW * 100;
@@ -2613,7 +2613,7 @@
avgRdBW = (bytesRead / 1000000) / simSeconds;
avgWrBW = (bytesWritten / 1000000) / simSeconds;
- peakBW = (SimClock::Frequency / nvm.tBURST) *
+ peakBW = (sim_clock::Frequency / nvm.tBURST) *
nvm.burstSize / 1000000;
busUtil = (avgRdBW + avgWrBW) / peakBW * 100;
diff --git a/src/mem/probes/mem_trace.cc b/src/mem/probes/mem_trace.cc
index 0674014..0bfce3d 100644
--- a/src/mem/probes/mem_trace.cc
+++ b/src/mem/probes/mem_trace.cc
@@ -84,7 +84,7 @@
// the stream
ProtoMessage::PacketHeader header_msg;
header_msg.set_obj_id(name());
- header_msg.set_tick_freq(SimClock::Frequency);
+ header_msg.set_tick_freq(sim_clock::Frequency);
for (int i = 0; i < system->maxRequestors(); i++) {
auto id_string = header_msg.add_id_strings();
diff --git a/src/mem/qos/mem_ctrl.cc b/src/mem/qos/mem_ctrl.cc
index 1dba59e..9f8faf0 100644
--- a/src/mem/qos/mem_ctrl.cc
+++ b/src/mem/qos/mem_ctrl.cc
@@ -184,7 +184,7 @@
}
// Compute latency
double latency = (double) (curTick() + delay - requestTime)
- / SimClock::Float::s;
+ / sim_clock::Float::s;
if (latency > 0) {
// Record per-priority latency stats
diff --git a/src/mem/xbar.cc b/src/mem/xbar.cc
index dc12fcd..45f8e1b 100644
--- a/src/mem/xbar.cc
+++ b/src/mem/xbar.cc
@@ -117,7 +117,7 @@
// do a quick sanity check to ensure the timings are not being
// ignored, note that this specific value may cause problems for
// slower interconnects
- panic_if(pkt->headerDelay > SimClock::Int::us,
+ panic_if(pkt->headerDelay > sim_clock::Int::us,
"Encountered header delay exceeding 1 us\n");
if (pkt->hasData()) {
diff --git a/src/sim/clocked_object.hh b/src/sim/clocked_object.hh
index 23ace92..0f12143 100644
--- a/src/sim/clocked_object.hh
+++ b/src/sim/clocked_object.hh
@@ -209,7 +209,7 @@
*/
Tick nextCycle() const { return clockEdge(Cycles(1)); }
- uint64_t frequency() const { return SimClock::Frequency /
clockPeriod(); }
+ uint64_t frequency() const { return sim_clock::Frequency /
clockPeriod(); }
Tick clockPeriod() const { return clockDomain.clockPeriod(); }
diff --git a/src/sim/core.cc b/src/sim/core.cc
index baa56ab..1ef67b4 100644
--- a/src/sim/core.cc
+++ b/src/sim/core.cc
@@ -38,7 +38,9 @@
#include "base/logging.hh"
#include "base/output.hh"
-namespace SimClock {
+GEM5_DEPRECATED_NAMESPACE(SimClock, sim_clock);
+namespace sim_clock
+{
/// The simulated frequency of curTick(). (In ticks per second)
Tick Frequency;
@@ -63,7 +65,7 @@
Tick ps;
} // namespace Float
-} // namespace SimClock
+} // namespace sim_clock
namespace {
@@ -80,7 +82,7 @@
if (_clockFrequencyFixed)
return;
- using namespace SimClock;
+ using namespace sim_clock;
Frequency = _ticksPerSecond;
Float::s = static_cast<double>(Frequency);
Float::ms = Float::s / 1.0e3;
diff --git a/src/sim/core.hh b/src/sim/core.hh
index 30c8949..96cb58c 100644
--- a/src/sim/core.hh
+++ b/src/sim/core.hh
@@ -38,6 +38,7 @@
#include <functional>
#include <string>
+#include "base/compiler.hh"
#include "base/types.hh"
// @todo The next include is not needed in this file, but must be kept
// until the transitive includes are fixed
@@ -45,7 +46,9 @@
/// These are variables that are set based on the simulator frequency
///@{
-namespace SimClock {
+GEM5_DEPRECATED_NAMESPACE(SimClock, sim_clock);
+namespace sim_clock
+{
extern Tick Frequency; ///< The number of ticks that equal one second
namespace Float {
@@ -84,7 +87,7 @@
extern Tick ps; ///< picosecond
/** @} */
} // namespace Int
-} // namespace SimClock
+} // namespace sim_clock
/** @} */
void fixClockFrequency();
diff --git a/src/sim/power/thermal_model.cc b/src/sim/power/thermal_model.cc
index 3722956..9ecbae9 100644
--- a/src/sim/power/thermal_model.cc
+++ b/src/sim/power/thermal_model.cc
@@ -166,7 +166,7 @@
eq_nodes[i]->temp = Temperature::fromKelvin(temps[i]);
// Schedule next computation
- schedule(stepEvent, curTick() + SimClock::Int::s * _step);
+ schedule(stepEvent, curTick() + sim_clock::Int::s * _step);
// Notify everybody
for (auto dom : domains)
@@ -203,7 +203,7 @@
eq_nodes[i]->id = i;
// Schedule first thermal update
- schedule(stepEvent, curTick() + SimClock::Int::s * _step);
+ schedule(stepEvent, curTick() + sim_clock::Int::s * _step);
}
void
diff --git a/src/sim/pseudo_inst.cc b/src/sim/pseudo_inst.cc
index 7dc0fc0..131e914 100644
--- a/src/sim/pseudo_inst.cc
+++ b/src/sim/pseudo_inst.cc
@@ -126,7 +126,7 @@
quiesceNs(ThreadContext *tc, uint64_t ns)
{
DPRINTF(PseudoInst, "PseudoInst::quiesceNs(%i)\n", ns);
- tc->quiesceTick(curTick() + SimClock::Int::ns * ns);
+ tc->quiesceTick(curTick() + sim_clock::Int::ns * ns);
}
void
@@ -142,14 +142,14 @@
DPRINTF(PseudoInst, "PseudoInst::quiesceTime()\n");
return (tc->readLastActivate() - tc->readLastSuspend()) /
- SimClock::Int::ns;
+ sim_clock::Int::ns;
}
uint64_t
rpns(ThreadContext *tc)
{
DPRINTF(PseudoInst, "PseudoInst::rpns()\n");
- return curTick() / SimClock::Int::ns;
+ return curTick() / sim_clock::Int::ns;
}
void
@@ -174,7 +174,7 @@
{
DPRINTF(PseudoInst, "PseudoInst::m5exit(%i)\n", delay);
if (DistIface::readyToExit(delay)) {
- Tick when = curTick() + delay * SimClock::Int::ns;
+ Tick when = curTick() + delay * sim_clock::Int::ns;
exitSimLoop("m5_exit instruction encountered", 0, when, 0, true);
}
}
@@ -193,7 +193,7 @@
m5fail(ThreadContext *tc, Tick delay, uint64_t code)
{
DPRINTF(PseudoInst, "PseudoInst::m5fail(%i, %i)\n", delay, code);
- Tick when = curTick() + delay * SimClock::Int::ns;
+ Tick when = curTick() + delay * sim_clock::Int::ns;
exitSimLoop("m5_fail instruction encountered", code, when, 0, true);
}
@@ -304,8 +304,8 @@
return;
- Tick when = curTick() + delay * SimClock::Int::ns;
- Tick repeat = period * SimClock::Int::ns;
+ Tick when = curTick() + delay * sim_clock::Int::ns;
+ Tick repeat = period * sim_clock::Int::ns;
Stats::schedStatEvent(false, true, when, repeat);
}
@@ -318,8 +318,8 @@
return;
- Tick when = curTick() + delay * SimClock::Int::ns;
- Tick repeat = period * SimClock::Int::ns;
+ Tick when = curTick() + delay * sim_clock::Int::ns;
+ Tick repeat = period * sim_clock::Int::ns;
Stats::schedStatEvent(true, false, when, repeat);
}
@@ -332,8 +332,8 @@
return;
- Tick when = curTick() + delay * SimClock::Int::ns;
- Tick repeat = period * SimClock::Int::ns;
+ Tick when = curTick() + delay * sim_clock::Int::ns;
+ Tick repeat = period * sim_clock::Int::ns;
Stats::schedStatEvent(true, true, when, repeat);
}
@@ -346,8 +346,8 @@
return;
if (DistIface::readyToCkpt(delay, period)) {
- Tick when = curTick() + delay * SimClock::Int::ns;
- Tick repeat = period * SimClock::Int::ns;
+ Tick when = curTick() + delay * sim_clock::Int::ns;
+ Tick repeat = period * sim_clock::Int::ns;
exitSimLoop("checkpoint", 0, when, repeat);
}
}
diff --git a/src/sim/root.cc b/src/sim/root.cc
index 91b86b1..a22ae4b 100644
--- a/src/sim/root.cc
+++ b/src/sim/root.cc
@@ -75,7 +75,7 @@
statTime(true),
startTick(0)
{
- simFreq.scalar(SimClock::Frequency);
+ simFreq.scalar(sim_clock::Frequency);
simTicks.functor([this]() { return curTick() - startTick; });
finalTick.functor(curTick);
diff --git a/src/sim/syscall_emul.hh b/src/sim/syscall_emul.hh
index 63a9ea6..0bd2fa5 100644
--- a/src/sim/syscall_emul.hh
+++ b/src/sim/syscall_emul.hh
@@ -519,7 +519,7 @@
{
static const int OneMillion = 1000 * 1000;
- uint64_t elapsed_usecs = curTick() / SimClock::Int::us;
+ uint64_t elapsed_usecs = curTick() / sim_clock::Int::us;
sec = elapsed_usecs / OneMillion;
usec = elapsed_usecs % OneMillion;
}
@@ -532,7 +532,7 @@
{
static const int OneBillion = 1000 * 1000 * 1000;
- uint64_t elapsed_nsecs = curTick() / SimClock::Int::ns;
+ uint64_t elapsed_nsecs = curTick() / sim_clock::Int::ns;
sec = elapsed_nsecs / OneBillion;
nsec = elapsed_nsecs % OneBillion;
}
@@ -2102,7 +2102,7 @@
timesFunc(SyscallDesc *desc, ThreadContext *tc, VPtr<typename OS::tms>
bufp)
{
// Fill in the time structure (in clocks)
- int64_t clocks = curTick() * OS::M5_SC_CLK_TCK / SimClock::Int::s;
+ int64_t clocks = curTick() * OS::M5_SC_CLK_TCK / sim_clock::Int::s;
bufp->tms_utime = clocks;
bufp->tms_stime = 0;
bufp->tms_cutime = 0;
diff --git a/src/systemc/core/sc_time.cc b/src/systemc/core/sc_time.cc
index cd79c5c..0c7e3a5 100644
--- a/src/systemc/core/sc_time.cc
+++ b/src/systemc/core/sc_time.cc
@@ -50,7 +50,7 @@
if (d != 0)
fixClockFrequency();
- double scale = sc_gem5::TimeUnitScale[tu] * SimClock::Float::s;
+ double scale = sc_gem5::TimeUnitScale[tu] * sim_clock::Float::s;
// Accellera claims there is a linux bug, and that these next two
// lines work around them.
volatile double tmp = d * scale + 0.5;
@@ -94,13 +94,13 @@
sc_time::sc_time(double d, bool scale)
{
- double scaler = scale ? defaultUnit : SimClock::Float::Hz;
+ double scaler = scale ? defaultUnit : sim_clock::Float::Hz;
set(this, d * scaler, SC_SEC);
}
sc_time::sc_time(sc_dt::uint64 v, bool scale)
{
- double scaler = scale ? defaultUnit : SimClock::Float::Hz;
+ double scaler = scale ? defaultUnit : sim_clock::Float::Hz;
set(this, static_cast<double>(v) * scaler, SC_SEC);
}
@@ -125,7 +125,7 @@
double
sc_time::to_seconds() const
{
- return to_double() * SimClock::Float::Hz;
+ return to_double() * sim_clock::Float::Hz;
}
const std::string
@@ -377,7 +377,7 @@
defaultUnit = d * sc_gem5::TimeUnitScale[tu];
specified = true;
- double resolution = SimClock::Float::Hz;
+ double resolution = sim_clock::Float::Hz;
if (resolution == 0.0)
resolution = sc_gem5::TimeUnitScale[SC_PS];
if (defaultUnit < resolution) {
@@ -398,7 +398,7 @@
if (!t.value())
return;
- Tick frequency = SimClock::Frequency;
+ Tick frequency = sim_clock::Frequency;
// Shrink the frequency by scaling down the time period, ie converting
// it from cycles per second to cycles per millisecond, etc.
diff --git a/src/systemc/tlm_bridge/tlm_to_gem5.cc
b/src/systemc/tlm_bridge/tlm_to_gem5.cc
index 0a8f94d..1a35ff0 100644
--- a/src/systemc/tlm_bridge/tlm_to_gem5.cc
+++ b/src/systemc/tlm_bridge/tlm_to_gem5.cc
@@ -341,7 +341,7 @@
"Packet sending failed!\n");
auto delay =
- sc_core::sc_time((double)(ticks / SimClock::Int::ps),
sc_core::SC_PS);
+ sc_core::sc_time((double)(ticks / sim_clock::Int::ps),
sc_core::SC_PS);
// update time
t += delay;
diff --git a/src/systemc/utils/vcd.cc b/src/systemc/utils/vcd.cc
index 4da417d..7fd9ba1 100644
--- a/src/systemc/utils/vcd.cc
+++ b/src/systemc/utils/vcd.cc
@@ -254,7 +254,7 @@
std::string timedump_comment =
csprintf("All initial values are dumped below at time "
"%g sec = %g timescale units.",
- static_cast<double>(now) / SimClock::Float::s,
+ static_cast<double>(now) / sim_clock::Float::s,
static_cast<double>(now / timeUnitTicks));
writeComment(timedump_comment);
5 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the
submitted one.
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/45402
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https://gem5-review.googlesource.com/settings
Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I25b8cfc93f283081bc2add9fdef6fec7d7ff3846
Gerrit-Change-Number: 45402
Gerrit-PatchSet: 8
Gerrit-Owner: Daniel Carvalho <[email protected]>
Gerrit-Reviewer: Bobby R. Bruce <[email protected]>
Gerrit-Reviewer: Daniel Carvalho <[email protected]>
Gerrit-Reviewer: Gabe Black <[email protected]>
Gerrit-Reviewer: Hoa Nguyen <[email protected]>
Gerrit-Reviewer: Jason Lowe-Power <[email protected]>
Gerrit-Reviewer: Jason Lowe-Power <[email protected]>
Gerrit-Reviewer: kokoro <[email protected]>
Gerrit-MessageType: merged
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