Daniel Carvalho has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/45431 )
Change subject: arch-x86,dev: Rename DeliveryMode namespace as delivery_mode
......................................................................
arch-x86,dev: Rename DeliveryMode namespace as delivery_mode
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.
X86ISA::DeliveryMode became X86ISA::delivery_mode.
Change-Id: Id1d83ba0ac7a4092ba796c608945a9cc17911430
Signed-off-by: Daniel R. Carvalho <[email protected]>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45431
Tested-by: kokoro <[email protected]>
Reviewed-by: Hoa Nguyen <[email protected]>
Maintainer: Gabe Black <[email protected]>
---
M src/arch/x86/interrupts.cc
M src/arch/x86/intmessage.hh
M src/dev/x86/i82094aa.cc
M src/dev/x86/pc.cc
4 files changed, 20 insertions(+), 18 deletions(-)
Approvals:
Hoa Nguyen: Looks good to me, approved
Gabe Black: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/x86/interrupts.cc b/src/arch/x86/interrupts.cc
index be60586..9dee310 100644
--- a/src/arch/x86/interrupts.cc
+++ b/src/arch/x86/interrupts.cc
@@ -229,10 +229,10 @@
* using the IRR/ISR registers, checking against the TPR, etc.
* The SMI, NMI, ExtInt, INIT, etc interrupts go straight through.
*/
- if (deliveryMode == DeliveryMode::Fixed ||
- deliveryMode == DeliveryMode::LowestPriority) {
+ if (deliveryMode == delivery_mode::Fixed ||
+ deliveryMode == delivery_mode::LowestPriority) {
DPRINTF(LocalApic, "Interrupt is an %s.\n",
- DeliveryMode::names[deliveryMode]);
+ delivery_mode::names[deliveryMode]);
// Queue up the interrupt in the IRR.
if (vector > IRRV)
IRRV = vector;
@@ -244,22 +244,22 @@
clearRegArrayBit(APIC_TRIGGER_MODE_BASE, vector);
}
}
- } else if (!DeliveryMode::isReserved(deliveryMode)) {
+ } else if (!delivery_mode::isReserved(deliveryMode)) {
DPRINTF(LocalApic, "Interrupt is an %s.\n",
- DeliveryMode::names[deliveryMode]);
- if (deliveryMode == DeliveryMode::SMI && !pendingSmi) {
+ delivery_mode::names[deliveryMode]);
+ if (deliveryMode == delivery_mode::SMI && !pendingSmi) {
pendingUnmaskableInt = pendingSmi = true;
smiVector = vector;
- } else if (deliveryMode == DeliveryMode::NMI && !pendingNmi) {
+ } else if (deliveryMode == delivery_mode::NMI && !pendingNmi) {
pendingUnmaskableInt = pendingNmi = true;
nmiVector = vector;
- } else if (deliveryMode == DeliveryMode::ExtInt && !pendingExtInt)
{
+ } else if (deliveryMode == delivery_mode::ExtInt
&& !pendingExtInt) {
pendingExtInt = true;
extIntVector = vector;
- } else if (deliveryMode == DeliveryMode::INIT && !pendingInit) {
+ } else if (deliveryMode == delivery_mode::INIT && !pendingInit) {
pendingUnmaskableInt = pendingInit = true;
initVector = vector;
- } else if (deliveryMode == DeliveryMode::SIPI &&
+ } else if (deliveryMode == delivery_mode::SIPI &&
!pendingStartup && !startedUp) {
pendingUnmaskableInt = pendingStartup = true;
startupVector = vector;
@@ -482,7 +482,7 @@
int numContexts = sys->threads.size();
switch (low.destShorthand) {
case 0:
- if (message.deliveryMode == DeliveryMode::LowestPriority) {
+ if (message.deliveryMode == delivery_mode::LowestPriority)
{
panic("Lowest priority delivery mode "
"IPIs aren't implemented.\n");
}
diff --git a/src/arch/x86/intmessage.hh b/src/arch/x86/intmessage.hh
index 4910e27..690532e 100644
--- a/src/arch/x86/intmessage.hh
+++ b/src/arch/x86/intmessage.hh
@@ -31,6 +31,7 @@
#include "arch/x86/x86_traits.hh"
#include "base/bitunion.hh"
+#include "base/compiler.hh"
#include "base/types.hh"
#include "dev/x86/intdev.hh"
#include "mem/packet.hh"
@@ -48,7 +49,8 @@
Bitfield<21> trigger;
EndBitUnion(TriggerIntMessage)
- namespace DeliveryMode
+ GEM5_DEPRECATED_NAMESPACE(DeliveryMode, delivery_mode);
+ namespace delivery_mode
{
enum IntDeliveryMode
{
@@ -72,7 +74,7 @@
{
return mode == 3;
}
- }
+ } // namespace delivery_mode
static const Addr TriggerIntOffset = 0;
diff --git a/src/dev/x86/i82094aa.cc b/src/dev/x86/i82094aa.cc
index dabfe8c..5ae4315 100644
--- a/src/dev/x86/i82094aa.cc
+++ b/src/dev/x86/i82094aa.cc
@@ -187,7 +187,7 @@
} else {
TriggerIntMessage message = 0;
message.destination = entry.dest;
- if (entry.deliveryMode == DeliveryMode::ExtInt) {
+ if (entry.deliveryMode == delivery_mode::ExtInt) {
assert(extIntPic);
message.vector = extIntPic->getVector();
} else {
@@ -200,7 +200,7 @@
std::list<int> apics;
int numContexts = sys->threads.size();
if (message.destMode == 0) {
- if (message.deliveryMode == DeliveryMode::LowestPriority) {
+ if (message.deliveryMode == delivery_mode::LowestPriority) {
panic("Lowest priority delivery mode from the "
"IO APIC aren't supported in physical "
"destination mode.\n");
@@ -222,7 +222,7 @@
apics.push_back(localApic->getInitialApicId());
}
}
- if (message.deliveryMode == DeliveryMode::LowestPriority &&
+ if (message.deliveryMode == delivery_mode::LowestPriority &&
apics.size()) {
// The manual seems to suggest that the chipset just does
// something reasonable for these instead of actually using
diff --git a/src/dev/x86/pc.cc b/src/dev/x86/pc.cc
index 7df442b..c3e813d 100644
--- a/src/dev/x86/pc.cc
+++ b/src/dev/x86/pc.cc
@@ -65,11 +65,11 @@
*/
X86ISA::I82094AA &ioApic = *southBridge->ioApic;
X86ISA::I82094AA::RedirTableEntry entry = 0;
- entry.deliveryMode = X86ISA::DeliveryMode::ExtInt;
+ entry.deliveryMode = X86ISA::delivery_mode::ExtInt;
entry.vector = 0x20;
ioApic.writeReg(0x10, entry.bottomDW);
ioApic.writeReg(0x11, entry.topDW);
- entry.deliveryMode = X86ISA::DeliveryMode::Fixed;
+ entry.deliveryMode = X86ISA::delivery_mode::Fixed;
entry.vector = 0x24;
ioApic.writeReg(0x18, entry.bottomDW);
ioApic.writeReg(0x19, entry.topDW);
6 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the
submitted one.
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/45431
To unsubscribe, or for help writing mail filters, visit
https://gem5-review.googlesource.com/settings
Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Id1d83ba0ac7a4092ba796c608945a9cc17911430
Gerrit-Change-Number: 45431
Gerrit-PatchSet: 9
Gerrit-Owner: Daniel Carvalho <[email protected]>
Gerrit-Reviewer: Daniel Carvalho <[email protected]>
Gerrit-Reviewer: Gabe Black <[email protected]>
Gerrit-Reviewer: Hoa Nguyen <[email protected]>
Gerrit-Reviewer: kokoro <[email protected]>
Gerrit-MessageType: merged
_______________________________________________
gem5-dev mailing list -- [email protected]
To unsubscribe send an email to [email protected]
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
