Giacomo Travaglini has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/46620 )
Change subject: cpu: Fix import in O3 CheckerCPU
......................................................................
cpu: Fix import in O3 CheckerCPU
ArmMMU isn't defined in ArmTLB
Signed-off-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
Change-Id: Idc33720303d20cf6176e6ec6d17197661526eb2e
---
M src/cpu/o3/O3CPU.py
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/cpu/o3/O3CPU.py b/src/cpu/o3/O3CPU.py
index fd03114..7cbb568 100644
--- a/src/cpu/o3/O3CPU.py
+++ b/src/cpu/o3/O3CPU.py
@@ -178,7 +178,7 @@
def addCheckerCpu(self):
if buildEnv['TARGET_ISA'] in ['arm']:
- from m5.objects.ArmTLB import ArmMMU
+ from m5.objects.ArmMMU import ArmMMU
self.checker = O3Checker(workload=self.workload,
exitOnError=False,
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Idc33720303d20cf6176e6ec6d17197661526eb2e
Gerrit-Change-Number: 46620
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-MessageType: newchange
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