Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/46625 )
Change subject: cpu: Dispatch PCEvents to the CheckerCPU SimpleThread
......................................................................
cpu: Dispatch PCEvents to the CheckerCPU SimpleThread
Moving PCEvents scheduling from the system to the Thread [1]
requires us to forward PCEvents to the CheckerCPU thread.
We will otherwise encounter a divergence with the checker when trying to
emulate a SkipFunction in the host (e.g. udelay on Arm).
While the original thread will correctly emulate it and jump to the next
instruction in the binary), the Checker's thread, with no scheduled
PCEvent, will jump straight into the function.
This is fixing realview64-o3-checker.py regression
JIRA: https://gem5.atlassian.net/browse/GEM5-364
[1]: https://gem5-review.googlesource.com/c/public/gem5/+/22106
Signed-off-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
Change-Id: I8543535eac3adc366e976b1c0999aafaeca6b141
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46625
Reviewed-by: Richard Cooper <richard.coo...@arm.com>
Reviewed-by: Jason Lowe-Power <power...@gmail.com>
Maintainer: Jason Lowe-Power <power...@gmail.com>
Tested-by: kokoro <noreply+kok...@google.com>
---
M src/cpu/checker/thread_context.hh
1 file changed, 18 insertions(+), 3 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
Richard Cooper: Looks good to me, but someone else must approve
kokoro: Regressions pass
diff --git a/src/cpu/checker/thread_context.hh
b/src/cpu/checker/thread_context.hh
index 9a00488..9b65097 100644
--- a/src/cpu/checker/thread_context.hh
+++ b/src/cpu/checker/thread_context.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2011-2012, 2016-2018, 2020 ARM Limited
+ * Copyright (c) 2011-2012, 2016-2018, 2020-2021 Arm Limited
* Copyright (c) 2013 Advanced Micro Devices, Inc.
* All rights reserved
*
@@ -84,8 +84,23 @@
CheckerCPU *checkerCPU;
public:
- bool schedule(PCEvent *e) override { return actualTC->schedule(e); }
- bool remove(PCEvent *e) override { return actualTC->remove(e); }
+ bool
+ schedule(PCEvent *e) override
+ {
+ GEM5_VAR_USED bool check_ret = checkerTC->schedule(e);
+ bool actual_ret = actualTC->schedule(e);
+ assert(actual_ret == check_ret);
+ return actual_ret;
+ }
+
+ bool
+ remove(PCEvent *e) override
+ {
+ GEM5_VAR_USED bool check_ret = checkerTC->remove(e);
+ bool actual_ret = actualTC->remove(e);
+ assert(actual_ret == check_ret);
+ return actual_ret;
+ }
void
scheduleInstCountEvent(Event *event, Tick count) override
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I8543535eac3adc366e976b1c0999aafaeca6b141
Gerrit-Change-Number: 46625
Gerrit-PatchSet: 3
Gerrit-Owner: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Gabe Black <gabe.bl...@gmail.com>
Gerrit-Reviewer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Jason Lowe-Power <ja...@lowepower.com>
Gerrit-Reviewer: Jason Lowe-Power <power...@gmail.com>
Gerrit-Reviewer: Richard Cooper <richard.coo...@arm.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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